ZXFV4089 datasheet(10/12 Pages) DIODES

10 / 12 page

ZXFV4089

Issue 4 - December 2008

www.zetex.com

www.diodes.com

Attention is drawn to the footnote of the DC electrical characteristics table, regarding input signal

amplitude. The video signal is ac coupled into the main amplifier and clamped to VREF. As a result

of this the actual voltage seen by the device input at pin 2 is the sum of VREF plus the video input

signal voltage excursion above VREF (when clamping the back porch, this excursion is normally

the luminance waveform of up to about 0.72V white level). At a particular positive value at pin 2

close to 2.7V, the leakage current of the Sample-hold switch increases causing an increase in the

droop rate. Therefore, for example, a reference voltage of 2V with a peak white video signal of

0.7V could result in increased restoration error arising from the increased DC offset. If pin 2 is

driven above +2.7V peak voltage the DC restoration accuracy could be affected and care should

be taken in this respect. When using 0.7V luminance, this is consistent with the maximum

recommended reference voltage of +2V.

Evaluation circuit

An evaluation circuit is available to allow demonstration of the video black-level clamping

function. The circuit uses the Zetex ZXFV4583 sync separator circuit to provide the HOLD function

timing signal. This circuit is described in the datasheet for ZXFV4583. To order the evaluation

board, ask for ZXFV4583EV.

ZXFV4089 Datasheet(PDF) 10 Page - Diodes Incorporated