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LC7218 Datasheet(PDF) 4 Page - Sanyo Semicon Device

Part # LC7218
Description  PLL Frequency Synthesizer for Electronic Tuning in AV Systems
PDF  16 Pages
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Manufacturer  SANYO [Sanyo Semicon Device]
Direct Link  https://www.sanyo-av.com/us/
Logo SANYO - Sanyo Semicon Device

LC7218 Datasheet(HTML) 4 Page - Sanyo Semicon Device

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Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V
Note: 1.
DV and SP are bits in the serial data.
*: don’t care
2. Frequency measurement
3. Frequency measurement
4. Period measurement
5. fIN (2): 10 to 160 MHz/VIN (2)
0.100 Vrms (minimum)
6. fIN (4): 10 to 70 MHz/VIN (4)
0.100 Vrms (minimum)
No. 4758-4/16
LC7218, 7218M, 7218JM
Parameter
Symbol
Conditions
min
typ
max
Unit
Supply voltage
VDD (1)
VDD
4.5
6.5
V
VDD (2)
VDD: Crystal oscillator guaranteed operation
3.5
6.5
V
Input high level voltage
VIH (1)
CE, CL, DI, IN0, IN1
2.2
6.5
V
VIH (2)
LCTR: Pulse waveform, DC coupling*4
0.7 VDD (1)
VDD (1)
V
Input low level voltage
VIL (1)
CE, CL, DI, IN0, IN1
0
0.7
V
VIL (2)
LCTR*4
0
0.3 VDD (1)
V
Output voltage
VOUT (1)
DO, SYC
6.5
V
VOUT (2)
OUT3 to OUT6, OUT0
13
V
fIN (1)
XIN: Sine wave capacitor coupling, VDD (2)
1.0
7.2
8.0
MHz
fIN (2)
FMIN: Sine wave capacitor coupling, VDD (1)*1
10
130 (160)*5
MHz
Input frequency
fIN (3)
AMIN: Sine wave capacitor coupling, VDD (1)*1
0.5
40
MHz
fIN (4)
HCTR: Sine wave capacitor coupling, VDD (1)*2
10
60 (70)*6
MHz
fIN (5)
LCTR: Sine wave capacitor coupling, VDD (1)*3
15
500
kHz
fIN (6)
LCTR: Pulse wave DC coupling, VDD (1)*4
1.0
20
× 103
Hz
Crystal oscillators for which
Xtal
XIN-XOUT: CI ≤ 50 Ω
3.0
7.2
8.0
MHz
operation is guaranteed
VIN (1)
XIN: Sine wave capacitor coupling, VDD (1)
0.5
1.5
Vrms
VIN (2)
FMIN: Sine wave capacitor coupling, VDD (1)
0.070
1.5
Vrms
(0.100)*5
Input amplitude
VIN (3)
AMIN: Sine wave capacitor coupling, VDD (1)
0.070
1.5
Vrms
VIN (4)
HCTR: Sine wave capacitor coupling, VDD (1)*2
0.070
1.5
Vrms
(0.100)*6
VIN (5)
LCTR: Sine wave capacitor coupling, VDD (1)*3
0.070
1.5
Vrms
DV
SP
Input frequency
1/2 divider
1/16, 17 swallow
12-bit main divider
Input pin
1
*
10 to 130 (160) MHz
q
q
q
q
q
q
FMIN
0
1
2 to 40 MHz
—
q
q
q
q
AMIN
0
0
0.5 to 10 MHz
—
—
q
q
AMIN



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