No. 4796-8/13

LC72321

Continued from preceding page.

Pin

Pin No.

Function

I/O

I/O circuit type

PH0

PH1/BEEP

PH2/DAC1

PH3/DAC2

PI0/S25

PI1/S26

PI2/S27

PI3/S28

S1 to S24

COM1

COM2

FMIN

AMIN

10

9

8

7

39

38

37

36

63 to 40

65

64

74

75

Dedicated output port

Since these pins are high breakdown voltage n-channel

transistor open-drain outputs, they can be effectively used for

functions such as band power supply switching.

Note that PH1 is also used as the BEEP output and that PH2

and PH3 are also used as the DAC1 and DAC2 outputs.

These ports go to the high impedance state during a reset,

i.e., when the RES pin is low, and in BACKUP mode.

Dedicated output port

While these pins have a CMOS output circuit structure, they

can be switched to function as LCD drivers. Their function is

switched by the SS and RS instructions. These pins cannot

be switched individually.

The LCD driver function is selected and a segment off signal

is output when power is first applied or when RES is low.

These pins are held at the low level in BACKUP mode.

Note that when the general-purpose port use option is

specified, these pins output the contents of IPORT when LPC

is 1, and the contents of the general-purpose output port

LATCH when LPC is 0.

LCD driver segment outputs

A frame frequency of 100 Hz and a 1/2 duty, 1/2 bias drive

type are used.

A segment off signal is output when power is first applied or

when RES is low.

These pins are held at the low level in BACKUP mode.

The use of these pins as general-purpose output ports can be

specified as an option.

LCD driver common outputs

A 1/2 duty, 1/2 bias drive type is used.

The output when power is first applied or when RES is low is

identical to the normal operating mode output.

These pins are held at the low level in BACKUP mode.

FM VCO (local oscillator) input

The input must be capacitor-coupled.

The input frequency range is from 10 to 130 MHz.

AM VCO (local oscillator) input

The band supported by this pin can be selected using the PLL

instruction.

High (2 to 40 MHz)

→ SW

Low (0.5 to 10 MHz)

→ LW and MW

Output

Output

Output

Output

Input

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