No. 5544-7/14

LC72P366

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Pin No.

Symbol

I/O

I/O type

Function

76

73

31

75

74

72

71

FMIN

AMIN

SUBPD

EO3

—

I

I

O

O

—

Input

Input

CMOS tristate

CMOS tristate

Power supply connections

FM VCO (local oscillator) input

This pin is selected by the PLL instruction CW1 (b1, b0 are ignored).

Capacitor coupling must be used for signal input.

Input is disabled when the HOLD pin is set low in the hold enable state.

Input is disabled in clock stop mode, during the power-on reset, and in the PLL stop state.

AM VCO (local oscillator) input

This pin is selected and the band set by the PLL instruction CW1 (b1, b0).

Capacitor coupling must be used for signal input.

Input is disabled when the HOLD pin is set low in the hold enable state.

Input is disabled in clock stop mode, during the power-on reset, and in the PLL stop state.

Sub-charge pump output

This pin, in combination with the main charge pump, allows the construction of a high-

speed locking circuit.

The DZC instruction controls the sub-charge pump.

This pin goes to the high-impedance state when the HOLD pin is set low in the hold enable

state.

This pin goes to the high-impedance state in clock stop mode, during the power-on reset,

and in the PLL stop state.

Second PLL charge pump output

This pin outputs a low level when the frequency generated by dividing the local oscillator

signal frequency by N is higher than the reference frequency, and a high level when that

frequency is lower.

This pin goes to the high-impedance state when the frequencies match. (Note that this

pin’s output logic is the opposite of that of the EO1 and EO2 pins.)

This pin goes to the high-impedance state when the HOLD pin is set low in the hold enable

state.

This pin goes to the high-impedance state in clock stop mode, during the power-on reset,

and in the PLL stop state.

b1

b0

Band

1

0

2 to 40 MHz (SW)

1

1

0.5 to 10 MHz (MW, LW)

b3

b2

Operation

0

0

High impedance

0

1

Only operates in the unlocked state (450 kHz)

1

0

Only operates in the unlocked state (900 kHz)

1

1

Normal operation