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HT46R065D Datasheet(PDF) 39 Page - Holtek Semiconductor Inc |
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HT46R065D Datasheet(HTML) 39 Page - Holtek Semiconductor Inc |
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39 / 114 page  Under normal program operation, a Watchdog Timer time-out will initialise a device reset and set the status bit TO. However, if the system is in the Sleep Mode, when a Watchdog Timer time-out occurs, the device will be woken up, the TO bit in the status register will be set and only the Program Counter and Stack Pointer will be reset. Three methods can be adopted to clear the contents of the Watchdog Timer. The first is an external hardware reset, which means a low level on the external reset pin, the second is using the Clear Watchdog Timer software instructions and the third is when a HALT instruction is executed. There are two methods of using software instructions to clear the Watchdog Timer, one of which must be chosen by configuration option. The first option is to use the single ²CLR WDT ² instruction while the second is to use the two commands ²CLR WDT1² and ²CLR WDT2². For the first option, a simple execution of ²CLR WDT² will clear the Watchdog Timer while for the second option, both ²CLR WDT1² and ²CLR WDT2² must both be executed to successfully clear the Watchdog Timer. Note that for this second option, if ²CLR WDT1² is used to clear the Watchdog Timer, successive executions of this instruction will have no effect, only the execution of a ²CLR WDT2 ² instruction will clear the Watchdog Timer. Similarly after the ²CLR WDT2² instruction has been executed, only a successive ²CLR WDT1² instruction can clear the Watchdog Timer. WDTS Register Bit 7 6 5 4 3 2 1 0 Name ¾ ¾ ¾ ¾ ¾ WS2 WS1 WS0 R/W ¾ ¾ ¾ ¾ ¾ R/W R/W R/W POR ¾ ¾ ¾ ¾ ¾ 1 1 1 Bit7~3: unimplemented,readas ²0² Bit2~0 WS2,WS1,WS0: WDT time-outperiodselection 000:2 8 t WDTCK 001:2 9 t WDTCK 010:2 10 t WDTCK 011:2 11 t WDTCK 100:2 12 t WDTCK 101:2 13 t WDTCK 110:2 14 t WDTCK 111:2 15 t WDTCK Rev.1.00 34 January12,2011 HT46R064D/065D/066D EnhancedA/DType8-Bit OTP MCU withLEDDriver |
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