SST25VF032B datasheet(10/31 Pages) MICROCHIP

10 / 31 page

S71327-04-000

02/11

32 Mbit SPI Serial Flash

SST25VF032B

Data Sheet

A Microchip Technology Company

Read (25 MHz)

The Read instruction, 03H, supports up to 25 MHz Read. The device outputs the data starting from the

specified address location. The data output stream is continuous through all addresses until termi-

nated by a low to high transition on CE#. The internal address pointer will automatically increment until

the highest memory address is reached. Once the highest memory address is reached, the address

pointer will automatically increment to the beginning (wrap-around) of the address space. For example,

once the data from address location 3FFFFFH has been read, the next output will be from address

location 000000H.

The Read instruction is initiated by executing an 8-bit command, 03H, followed by address bits [A23-

A0]. CE# must remain active low for the duration of the Read cycle. See Figure 5 for the Read

sequence.

Figure 5: Read Sequence

EBSY

Enable SO as an out-

put RY/BY# status dur-

ing AAI programming

0111 0000b (70H)

80 MHz

DBSY

Disable SO as RY/BY#

status during AAI pro-

gramming

1000 0000b (80H)

80 MHz

T5.0

1327

1. One bus cycle is eight clock periods.

2. Address bits above the most significant bit can be either VIL or VIH.

3. 4KByte Sector Erase addresses: use AMS-A12, remaining addresses are don’t care but must be set either at VIL or VIH.

4. 32KByte Block Erase addresses: use AMS-A15, remaining addresses are don’t care but must be set either at VIL or VIH.

5. 64KByte Block Erase addresses: use AMS-A16, remaining addresses are don’t care but must be set either at VIL or VIH.

6. To continue programming to the next sequential address location, enter the 8-bit command, ADH, followed by 2 bytes of

data to be programmed. Data Byte 0 will be programmed into the initial address [A23-A1] with A0=0, Data Byte 1 will be

programmed into the

initial address [A23-A1] with A0 =1.

7. The Read-Status-Register is continuous with ongoing clock cycles until terminated by a low to high transition on CE#.

8. Manufacturer’s ID is read with A0 = 0, and Device ID is read with A0 = 1. All other address bits are 00H. The Manufac-

turer’s ID and device ID output stream is continuous until terminated by a low-to-high transition on CE#.

Table 5: Device Operation Instructions (Continued) (2 of 2)

Instruction

Description

Op Code Cycle1

Address

Cycle(s)2

Dummy

Cycle(s)

Data

Cycle(s)

Maximum

Frequency

1327 F06.0

CE#

SCK

ADD.

01 2 3 4 5 6 7 8

ADD.

HIGH IMPEDANCE

15 16

23 24

31 32

39 40

55 56

63 64

N+2

N+3

N+4

N+1

DOUT

MSB

MODE 0

MODE 3

DOUT

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