©2011 Silicon Storage Technology, Inc.

S71327-04-000

02/11

18

32 Mbit SPI Serial Flash

SST25VF032B

Data Sheet

A Microchip Technology Company

Write-Enable (WREN)

The Write-Enable (WREN) instruction sets the Write-Enable-Latch bit in the Status Register to ‘1’

allowing Write operations to occur. The WREN instruction must be executed prior to any Write (Pro-

gram/Erase) operation. The WREN instruction may also be used to allow execution of the Write-Sta-

tus-Register (WRSR) instruction; however, the Write-Enable-Latch bit in the Status Register will be

cleared upon the rising edge CE# of the WRSR instruction. CE# must be driven high before the WREN

instruction is executed.

Figure 17:Write Enable (WREN) Sequence

Write-Disable (WRDI)

The Write-Disable (WRDI) instruction resets the Write-Enable-Latch bit and AAI bit to ‘0,’ therefore,

preventing any new Write operations. The WRDI instruction will not terminate any programming opera-

instruction. CE# must be driven high before the WRDI instruction is executed.

Figure 18:Write Disable (WRDI) Sequence

CE#

SO

SI

SCK

01 2 3 4 5 6 7

06

HIGH IMPEDANCE

MODE 0

MODE 3

1327 F18.0

MSB

CE#

SO

SI

SCK

01 2 3 4 5 6 7

04

HIGH IMPEDANCE

MODE 0

MODE 3

1327 F19.0

MSB