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MSP430F4152IPM Datasheet(PDF) 14 Page - Texas Instruments |
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MSP430F4152IPM Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 82 page ![]() MSP430F41x2 MIXED SIGNAL MICROCONTROLLER SLAS648E -- APRIL 2009 -- REVISED MARCH 2011 14 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 interrupt flag register 1 and 2 Address 7 654 321 0 02h NMIIFG RSTIFG PORIFG OFIFG WDTIFG rw--0 rw--(0) rw--(1) rw--1 rw--(0) WDTIFG Set on watchdog timer overflow (in watchdog mode) or security key violation. Reset on VCC power-up or a reset condition at RST/NMI pin in reset mode. OFIFG Flag set on oscillator fault RSTIFG External reset interrupt flag. Set on a reset condition at RST/NMI pin in reset mode. Reset on VCC power-up. PORIFG Power-on interrupt flag. Set on VCC power--up. NMIIFG Set via RST/NMI-pin Address 7 654 321 0 03h BTIFG UCB0 TXIFG UCB0 RXIFG UCA0 TXIFG UCA0 RXIFG rw--0 rw--1 rw--0 rw--1 rw--0 UCA0RXIFG USCI_A0 receive interrupt flag UCA0TXIFG USCI_A0 transmit interrupt flag UCB0RXIFG USCI_B0 receive interrupt flag UCB0TXIFG USCI_B0 transmit interrupt flag BTIFG Basic Timer1 interrupt flag Legend rw: rw-0,1: Bit can be read and written. Bit can be read and written. It is Reset or set by PUC. Bit can be read and written. It is Reset or set by POR. rw-(0,1): SFR bit is not present in device |
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