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TMS320F28044 Datasheet(PDF) 81 Page - Texas Instruments |
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TMS320F28044 Datasheet(HTML) 81 Page - Texas Instruments |
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81 / 115 page  C4 C3 XCLKOUT(B) XCLKIN(A) C5 C9 C10 C1 C8 C6 TMS320F28044 www.ti.com SPRS357C – AUGUST 2006 – REVISED JANUARY 2010 A. The relationship of XCLKIN to XCLKOUT depends on the divide factor chosen. The waveform relationship shown is intended to illustrate the timing parameters only and may differ based on actual configuration. B. XCLKOUT configured to reflect SYSCLKOUT. Figure 6-3. Clock Timing 6.8 Power Sequencing No requirements are placed on the power up/down sequence of the various power pins to ensure the correct reset state for all the modules. However, if the 3.3-V transistors in the level shifting output buffers of the I/O pins are powered prior to the 1.8-V transistors, it is possible for the output buffers to turn on, causing a glitch to occur on the pin during power up. To avoid this behavior, power the VDD pins prior to or simultaneously with the VDDIO pins, ensuring that the VDD pins have reached 0.7 V before the VDDIO pins reach 0.7 V. There are some requirements on the XRS pin: 1. During power up, the XRS pin must be held low for tw(RSL1) after the input clock is stable (see Table 6-9). This is to enable the entire device to start from a known condition. 2. During power down, the XRS pin must be pulled low at least 8 ms prior to VDD reaching 1.5 V. This is to enhance flash reliability. Additionally it is recommended that no voltage larger than a diode drop (0.7 V) should be applied to any pin prior to powering up the device. Voltages applied to pins on an unpowered device can bias internal p-n junctions in unintended ways and produce unpredictable results. 6.8.1 Power Management and Supervisory Circuit Solutions Table 6-8 lists the power management and supervisory circuit solutions for F28044 DSP. LDO selection depends on the total power consumed in the end application. Go to www.power.ti.com for a complete list of TI power ICs or select the Reference Designs link for specific power reference designs. Table 6-8. Power Management and Supervisory Circuit Solutions SUPPLIER TYPE PART DESCRIPTION Texas Instruments LDO TPS767D301 Dual 1-A low-dropout regulator (LDO) with supply voltage supervisor (SVS) Texas Instruments LDO TPS70202 Dual 500/250-mA LDO with SVS Texas Instruments LDO TPS766xx 250-mA LDO with PG Texas Instruments SVS TPS3808 Open Drain SVS with programmable delay Texas Instruments SVS TPS3803 Low-cost Open-drain SVS with 5-mS delay Texas Instruments LDO TPS799xx 200-mA LDO in WCSP package Texas Instruments LDO TPS736xx 400-mA LDO with 40 mV of VDO Texas Instruments DC/DC TPS62110 High Vin 1.2-A dc/dc converter in 4 x 4 QFN package Texas Instruments DC/DC TPS6230x 500-mA converter in WCSP package Copyright © 2006–2010, Texas Instruments Incorporated Electrical Specifications 81 Submit Documentation Feedback Product Folder Link(s): TMS320F28044 |
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