DS80C390 Dual CAN High-Speed Microprocessor

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REVISION HISTORY

REVISION

DESCRIPTION

062299

Initial preliminary release.

090799

Clarifies that unused/unimplemented bits in the CAN MOVX SRAM read 0.

Corrected multiplexed 2-cycle date memory

CEO-3 read figure to show RD and WR inactive.

110199

Corrected P5.2 and P5.3 pin descriptions.

Corrected description of sequence to activate the crystal frequency multiplier.

Corrected references to PQFP to read LQFP.

Added

RSTOL timing information.

032904

Official release (removed “preliminary” status).

Abs max soldering temp now references JEDEC standard.

AC and DC specifications updated to reflect final characterization data.

Clarified DC characteristics Note 6 concerning port 4 and 5.

Corrected PSEN trace in Figure 10 to not show assertion during MOVX write.

Corrected Table 3 to show unnecessary steps during 16/16 divide.

Supplied approximate oscillator-fail detection frequency.

Removed text references to Stop mode current.

Corrected location of PT2 in Table 14.

022305

In Absolute Maximum Ratings section (page 2):

Removed “A” from IPC/JEDEC J-STD-020A specification to support lead-free devices.

In DC Electrical Characteristics table (page 2):

Added Note 10

In AC Electrical Characteristics table (page 3):

Added note to (now) Note 11 that AC timing is characterized and guaranteed by design but

is not production tested.

060805

Added lead-free part numbers to Ordering Information table.

110905

Added new paragraph to page 33 stating “Software must ensure that the input value for the

normalize operation is not zero or the function will not complete. Compilers such as the one from

Keil Software have updated their libraries and compensate for this condition.”

Table 3: clarified text under “Normalize” function. Changed “Configure MCNTO register as

required.” to “Load MCNT0 with 00h.”