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FM3316 Datasheet(PDF) 24 Page - Ramtron International Corporation |
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FM3316 Datasheet(HTML) 24 Page - Ramtron International Corporation |
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24 / 28 page  FM33256/FM3316 SPI Companion w/ FRAM Rev. 2.0 Feb. 2009 Page 24 of 28 DC Operating Conditions, continued (TA = -40° C to + 85° C, VDD = 2.7V to 3.6V unless otherwise specified) Symbol Parameter Min Typ Max Units Notes VOL Output Low Voltage @ IOL = 3 mA - 0.4 V VOH Output High Voltage (SO, PFO) @ IOH = -2 mA VDD – 0.8 - V RRST Pull-up resistance for /RST inactive 50 400 K Ω VPFI Power Fail Input Reference Voltage 1.475 1.50 1.525 V VHYS Power Fail Input (PFI) Hysteresis (Rising) - 100 mV Notes 1. Full complete operation. Supervisory circuits, RTC, etc operate to lower voltages as specified. 2. SCK toggling between VDD-0.3V and VSS, other inputs VSS or VDD-0.3V. 3. All inputs at VSS or VDD, static. Trickle charger off (VBC=0). 4. The VBAK trickle charger automatically regulates the maximum voltage on this pin for capacitor backup applications. 5. VBAK = 3.0V, VDD < VSW, oscillator running, CNT at VBAK. 6. VBAK will source current when trickle charge is enabled (VBC bit=1), VDD > VBAK, and VBAK < VBAK max. 7. This is the VDD supply current contributed by enabling the trickle charger circuit, and does not account for IBAKTC. 8. This is the VDD supply current contributed by enabling the watchdog circuit, WDE=1 and WDET set to a non-zero value. 9. /RST is asserted active when VDD < VTP . 10. The minimum VDD to guarantee the level of /RST remains a valid VOL level. 11. VIN or VOUT = VSS to VDD. Does not apply to PFI, X1, or X2. 12. Includes /RST input detection of external reset condition to trigger driving of /RST signal by FM33xx. AC Parameters (TA = -40°C to + 85°C, VDD = 2.7V to 3.6V CL = 30 pF) Symbol Parameter Min Max Units Notes fCK SCK Clock Frequency 0 16 MHz tCH Clock High Time 28 ns 1 tCL Clock Low Time 28 ns 1 tCSU Chip Select Setup 10 ns tCSH Chip Select Hold 10 ns tOD Output Disable Time 20 ns 2 tODV Output Data Valid Time 24 ns tOH Output Hold Time 0 ns tD Deselect Time 90 ns tR Data In Rise Time 50 ns 1,3 tF Data In Fall Time 50 ns 1,3 tSU Data Setup Time 6 ns tH Data Hold Time 6 ns Notes 1. tCH + tCL = 1/fCK. 2. This parameter is characterized but not 100% tested. 3. Rise and fall times measured between 10% and 90% of waveform. Supervisor Timing (TA = -40° C to + 85° C, VDD = 2.7V to 3.6V) Symbol Parameter Min Max Units Notes tRPW /RST Pulse Width (active low time) 30 100 ms tRNR /RST Response Time to VDD<VTP (noise filter) 7 25 µs 1 tVR VDD Rise Time 50 - µs/V 1,2 tVF VDD Fall Time 100 - µs/V 1,2 tWDST Watchdog StartTime 0.3*tDOG1 tDOG1 ms 3 tWDET Watchdog EndTime tDOG2 3.3*tDOG2 ms 3 fCNT Frequency of Event Counter 0 1 kHz Notes 1 This parameter is characterized but not tested. 2 Slope measured at any point on VDD waveform. |
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