AD5116 datasheet(12/28 Pages) AD

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AD5110/AD5112/AD5114

Data Sheet

Rev. 0 | Page 12 of 28

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

TOP VIEW

(Not to Scale)

AD5110/

AD5112/

AD5114

VDD

6 SCL

5 GND

8 VLOGIC

7 SDA

NOTES

1. THE EXPOSED PAD IS INTERNALLY FLOATING.

Figure 4. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Description

VDD

Positive Power Supply; 2.3 V to 5.5 V. This pin should be decoupled with 0.1 µF ceramic capacitors and 10 µF

capacitors.

Terminal A of RDAC. GND ≤ VA ≤ VDD.

Wiper Terminal of RDAC. GND ≤ VW ≤ VDD.

Terminal B of RDAC. GND ≤ VB ≤ VDD.

GND

Ground Pin, Logic Ground Reference.

SCL

Serial Clock Line. This pin is used in conjunction with the SDA line to clock data into or out of the 16-bit input

registers.

SDA

Serial Data Line. This pin is used in conjunction with the SCL line to clock data into or out of the 16-bit input

registers. It is a bidirectional, open-drain data line that should be pulled to the supply with an external pull-up

resistor.

VLOGIC

Logic Power Supply; 1.8 V to VDD. This pin should be decoupled with 0.1

µF ceramic capacitors and 10 µF

capacitors.

EPAD

Exposed Pad. The exposed pad is internally floating.

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