AD5116 datasheet(23/28 Pages) AD

23 / 28 page

Data Sheet

AD5110/AD5112/AD5114

Rev. 0 | Page 23 of 28

EEPROM WRITE ACKNOWLEGDE POLLING

After each write operation to the EEPROM, an internal write

cycle begins. The I2C interface of the device is disabled. To

determine if the internal write cycle is complete and the I2C

interface is enabled, interface polling can be executed. I2C

interface polling can be conducted by sending a start condition,

followed by the slave address and the write bit. If the I2C

interface responds with an acknowledge, the write cycle is

complete, and the interface is ready to proceed with further

operations. Otherwise, I2C interface polling can be repeated

until it succeeds.

READ OPERATION

The AD5110/AD5112/AD5114 allow read back of the contents

of the RDAC register and EEPROM memory through the I2C

interface by using Command 6 (see Table 10).

When reading data back from the AD5110/AD5112/AD5114,

the user must first issue a readback command to the device.

This begins with a start command, followed by an address

byte (R/W = 0), after which the AD5110/AD5112/AD5114

acknowledges that it is prepared to receive data by pulling

SDA low.

Two bytes of data are then written to the AD5110/AD5112/

AD5114, the most significant byte followed by the least

significant byte. Both of these data bytes are acknowledged by

the AD5110/AD5112/AD5114. A stop condition follows. These

bytes contain the read instruction, which enables readback of

the RDAC register, EEPROM memory. The user can then read

back the data. This begins with a start command followed by an

address byte (R/W = 1), after which the device acknowledges

that it is prepared to transmit data by pulling SDA low. Two

bytes of data are then read from the device, which are both

acknowledged by the master, as shown in Figure 45. A stop

condition follows. If the master does not acknowledge the first

byte, then the second byte is not transmitted by the AD5110/

AD5112/AD5114.

The AD5110/AD5112/AD5114 does not support repeat

readback.

RESET

The AD5110/AD5112/AD5114 can be reset by executing

Command 4 (see Table 10). The reset command loads the

RDAC register with the contents of the EEPROM and takes

approximately 25 µs. EEPROM is pre-loaded to midscale at the

factory, and initial power-up is, accordingly, at midscale.

SHUTDOWN MODE

The AD5110/AD5112/AD5114 can be shut down by executing

the software shutdown command, Command 3 (see Table 10).

This feature places the RDAC in a zero-power-consumption

state where Terminal A is open-circuited and the wiper,

Terminal W is connected to Terminal B but a finite wiper

resistance of 45 Ω is present. The part can be taken out of

shutdown mode by executing Command 3 (see Table 10)

and setting Bit DB0 to 0.

SCL

SDA

START BY

MASTER

ACK. BY

AD5110

ACK. BY

AD5110

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

MOST SIGNIFICANT DATA BYTE

FRAME 3

LEAST SIGNIFICANT DATA BYTE

SCL (CONTINUED)

SDA (CONTINUED)

ACK. BY

AD5110

STOP BY

MASTER

STOP BY

MASTER

R/W

SCL

SDA

START BY

MASTER

ACK. BY

AD5110

NO ACK.

BY MASTER

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

MOST SIGNIFICANT DATA BYTE

R/W

Figure 45. AD5110 Interface Read Command

AD5116 Datasheet(PDF) 23 Page - Analog Devices

AD5116 Datasheet(HTML) 23 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28

Datasheet Download

Link URL