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HT56RB688 Datasheet(PDF) 87 Page - Holtek Semiconductor Inc |
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HT56RB688 Datasheet(HTML) 87 Page - Holtek Semiconductor Inc |
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87 / 164 page ![]() Buzzer Operating in a similar way to the Programmable Frequency Divider, the Buzzer function provides a means of producing a variable frequency output, suitable for applications such as Piezo-buzzer driving or other external circuits that require a precise frequency generator. The BZ and BZ pins form a complementary pair, and are pin-shared with I/O pins, PA0 and PA1. A configuration option is used to select from one of three buzzer options. The first option is for both pins PA0 and PA1 to be used as normal I/Os, the second option is for both pins to be configured as BZ and BZ buzzer pins, the third option selects only the PA0 pin to be used as a BZ buzzer pin with the PA1 pin retaining its normal I/O pin function. Note that the BZ pin is the inverse of the BZ pin which together generate a differential output which can supply more power to connected interfaces such as buzzers. The buzzer is driven by the internal clock source, which then passes through a divider, the division ratio of which is selected by configuration options to provide a range of buzzer frequencies from fS/2 2 to fS/2 9. The clock source that generates f S, which in turn controls the buzzer frequency, can originate from three different sources, the external 32.768kHz oscillator (LXT), the internal 32kHz RC oscillator (LIRC) or the System oscillator divided by 4 (fSYS/4), the choice of which is determined by the fS clock source configuration option. Note that the buzzer frequency is controlled by configuration options, which select both the source clock for the internal clock fS and the internal division ratio. There are no internal registers associated with the buzzer frequency. If the configuration options have selected both pins PA0 and PA1 to function as a BZ and BZ complementary pair of buzzer outputs, then for correct buzzer operation it is essential that both pins must be setup as outputs by setting bits PAC0 and PAC1 of the PAC port control register to zero. The PA0 data bit in the PA data register must also be set high to enable the buzzer outputs, if set low, both pins PA0 and PA1 will remain low. In this way the single bit PA0 of the PA register can be used as an on/off control for both the BZ and BZ buzzer pin outputs. Note that the PA1 data bit in the PA register has no control over the BZ buzzer pin PA1. PA0/PA1 Pin Function Control PAC Register PAC0 PAC Register PAC1 PA Data Register PA0 PA Data Register PA1 Output Function 001 x PA0=BZ PA1=BZ 000 x PA0= ²0² PA1= ²0² 011 x PA0=BZ PA1=input line 010 x PA0= ²0² PA1=input line 10 x D PA0=input line PA1=D 11 x x PA0=input line PA0=input line ²x ² stands for don¢t care ²D² stands for Data ²0² or ²1² HT56RB688 TinyPowerTM A/D type Smart Card OTP MCU with LCD, DAC, ISO 7816 and USB Interfaces Rev. 1.00 87 December 2, 2011 f S S o u r c e C o n f i g u r a t i o n O p t i o n f S Y S / 4 f L X T f L I R C C o n f i g u r a t i o n O p t i o n D i v i d e b y 2 2 ~ 2 9 f S B Z B Z Buzzer Function |
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