AFS090 datasheet(276/334 Pages) MICROSEMI

276 / 334 page

DC and Power Characteristics

3- 26

R e visio n 2

RAM Dynamic Contribution—PMEMORY

Operating Mode

PMEMORY = (NBLOCKS * PAC11 * β2 * FREAD-CLOCK) + (NBLOCKS * PAC12 * β3 * FWRITE-CLOCK)

NBLOCKS is the number of RAM blocks used in the design.

FREAD-CLOCK is the memory read clock frequency.

2 is the RAM enable rate for read operations—guidelines are provided in Table 3-17 on

page 3-27.

3 the RAM enable rate for write operations—guidelines are provided in Table 3-17 on page 3-27.

FWRITE-CLOCK is the memory write clock frequency.

Standby Mode and Sleep Mode

PMEMORY = 0 W

PLL/CCC Dynamic Contribution—PPLL

Operating Mode

PPLL = PAC13 * FCLKOUT

FCLKIN is the input clock frequency.

FCLKOUT is the output clock frequency.1

Standby Mode and Sleep Mode

PPLL = 0 W

Nonvolatile Memory Dynamic Contribution—PNVM

Operating Mode

The NVM dynamic power consumption is a piecewise linear function of frequency.

PNVM = NNVM-BLOCKS * β4 * PAC15 * FREAD-NVM when FREAD-NVM ≤ 33 MHz,

PNVM = NNVM-BLOCKS * β4 *(PAC16 + PAC17 * FREAD-NVM when FREAD-NVM > 33 MHz

NNVM-BLOCKS is the number of NVM blocks used in the design (2 inAFS600).

4 is the NVM enable rate for read operations. Default is 0 (NVM mainly in idle state).

FREAD-NVM is the NVM read clock frequency.

Standby Mode and Sleep Mode

PNVM = 0 W

Crystal Oscillator Dynamic Contribution—PXTL-OSC

Operating Mode

PXTL-OSC = PAC18

Standby Mode

PXTL-OSC = PAC18

Sleep Mode

PXTL-OSC = 0 W

The PLL dynamic contribution depends on the input clock frequency, the number of output clock signals generated by the

PLL, and the frequency of each output clock. If a PLL is used to generate more than one output clock, include each output

clock in the formula output clock by adding its corresponding contribution (PAC14 * FCLKOUT product) to the total PLL

contribution.

AFS090 Datasheet(PDF) 276 Page - Microsemi Corporation

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