AFS090 datasheet(326/334 Pages) MICROSEMI

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Datasheet Information

5- 10

R e visio n 2

Advance v0.9

(continued)

In the "484-Pin FBGA" table, the function changed from VCC33ACAP to VCC33A for the

following pins:

AFS600: AB18

AFS1500: AB18

3-20

In the "676-Pin FBGA" table, the function changed from VCC33ACAP to VCC33A for the

following pins:

AFS1500: AD20

3-28

Advance v0.8

(June 2007)

Figure 2-16 • Fusion Clocking Options and the "RC Oscillator" section were updated

to change GND_OSC and VCC_OSC to GNDOSC and VCCOSC.

2-20, 2-21

Figure 2-19 • Fusion CCC Options: Global Buffers with the PLL Macro was updated

to change the positions of OADIVRST and OADIVHALF, and a note was added.

2-25

The "Crystal Oscillator" section was updated to include information about controlling

and enabling/disabling the crystal oscillator.

2-22

Table 2-11 · Electrical Characteristics of the Crystal Oscillator was updated to

change the typical value of IDYNXTAL for 0.032–0.2 MHz to 0.19.

2-24

The "1.5 V Voltage Regulator" section was updated to add "or floating" in the

paragraph stating that an external pull-down is required on TRST to power down the

VR.

2-41

The "1.5 V Voltage Regulator" section was updated to include information on

powering down with the VR.

2-41

This sentence was updated in the "No-Glitch MUX (NGMUX)" section to delete GLA:

The GLMUXCFG[1:0] configuration bits determine the source of the CLK inputs (i.e.,

internal signal or GLC).

2-32

In Table 2-13 • NGMUX Configuration and Selection Table, 10 and 11 were deleted.

2-32

The method to enable sleep mode was updated for bit 0 in Table 2-16 • RTC

Control/Status Register.

2-38

S2 was changed to D2 in Figure 2-39 • Read Waveform (Pipe Mode, 32-bit access)

for RD[31:0] was updated.

2-51

The definitions for bits 2 and 3 were updated in Table 2-24 • Page Status Bit

Definition.

2-52

Figure 2-46 • FlashROM Timing Diagram was updated.

2-58

Table 2-26 • FlashROM Access Time is new.

2-58

Figure 2-55 • Write Access After Write onto Same Address, Figure 2-56 • Read

Access After Write onto Same Address, and Figure 2-57 • Write Access After Read

onto Same Address are new.

2-68–

2-70

Table 2-31 • RAM4K9 and Table 2-32 • RAM512X18 were updated.

2-71, 2-72

The VAREF and SAMPLE functions were updated in Table 2-36 • Analog Block Pin

Description.

2-82

The title of Figure 2-72 • Timing Diagram for Current Monitor Strobe was updated to

add the word "positive."

2-91

The "Gate Driver" section was updated to give information about the switching rate

in High Current Drive mode.

2-94

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