AFS090 datasheet(323/334 Pages) MICROSEMI

323 / 334 page

Fusion Family of Mixed Signal FPGAs

R e visio n 2

5 -7

Advance v1.3

(July 2008)

The "ADC Description" section was significantly updated. Please review carefully.

2-102

Advance v1.2

(May 2008)

Table 2-25 • Flash Memory Block Timing was significantly updated.

2-55

The "VAREF Analog Reference Voltage" pin description section was significantly

update. Please review it carefully.

2-226

Table 2-45 • ADC Interface Timing was significantly updated.

2-110

Table 2-56 • Direct Analog Input Switch Control Truth Table—AV (x = 0), AC (x = 1),

and AT (x = 3) was significantly updated.

2-131

The following sentence was deleted from the "Voltage Monitor" section:

The Analog Quad inputs are tolerant up to 12 V + 10%.

2-86

The "180-Pin QFN" figure was updated. D1 to D4 are new and the figure was

changed to bottom view. The note below the figure is new.

3-3

Advance v1.1

(May 2008)

The following text was incorrect and therefore deleted:

VCC33A

Analog Power Filter

Analog power pin for the analog power supply low-pass filter. An external 100 pF

capacitor should be connected between this pin and ground.

There is still a description of VCC33A on page 2-224.

2-204

Advance v1.0

(January 2008)

All Timing Characteristics tables were updated. For the Differential I/O Standards,

the Standard I/O support tables are new.

N/A

Table 2-3 • Array Coordinates was updated to change the max x and y values

2-9

Table 2-12 • Fusion CCC/PLL Specification was updated.

2-31

A note was added to Table 2-16 · RTC ACM Memory Map.

2-37

A reference to the Peripheral’s User’s Guide was added to the "Voltage Regulator

Power Supply Monitor (VRPSM)" section.

2-42

In Table 2-25 • Flash Memory Block Timing, the commercial conditions were

updated.

2-55

In Table 2-26 • FlashROM Access Time, the commercial conditions were missing

and have been added below the title of the table.

2-58

In Table 2-36 • Analog Block Pin Description, the function description was updated

for the ADCRESET.

2-82

In the "Voltage Monitor" section, the following sentence originally had ± 10% and it

was changed to +10%.

The Analog Quad inputs are tolerant up to 12 V + 10%.

In addition, this statement was deleted from the datasheet:

Each I/O will draw power when connected to power (3 mA at 3 V).

2-86

The "Terminology" section is new.

2-88

The "Current Monitor" section was significantly updated. Figure 2-72 • Timing

Diagram for Current Monitor Strobe to Figure 2-74 • Negative Current Monitor and

Table 2-37 • Recommended Resistor for Different Current Range Measurement are

new.

2-90

The "ADC Description" section was updated to add the "Terminology" section.

2-93

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