PSB2134 datasheet(8/95 Pages) SIEMENS

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PSB 2132

PSB 2134

Overview

Semiconductor Group

09.97

1.3

Pin Definition and Functions

Pin No. Symbol

Input (I)

Output (O)

Function

Common Pins for all Channels

DDD

+ 5 V supply for the digital circuitry

GNDD

Ground Digital, not internally connected to

GNDA1,2,(3,4)

All digital signals are referred to this pin

DDA12

+ 5 V Analog supply voltage for channel 1 and 2

REF

I/O

Reference voltage, has to be connected to a 220 nF

cap. to ground, can also be used as virtual ground

for analog inputs and outputs (high-ohmic buffer

needed !!!)

DDREF

+ 5 V Analog supply voltage (100 nF cap. required)

FSC

Frame synchronization clock, 8 kHz, identifies the

beginning of the frame, individual time slots are

referenced to this pin, FSC must be synchronous to

DCL and BCL

BCL

IOM-2 bit clock 768 kHz, determines the rate at

which PCM data is shifted into or out of the

PCM-ports

26,30

I/O

IOM-2 Data Upstream interface. Transmits or

receives PCM data in 8 bit bursts. Both pins must be

connected together.

27,29

I/O

IOM-2 Data Downstream interface. Transmits or

receives PCM data in 8 bit bursts. Both pins must be

connected together.

RESET

Reset input - forces the device to default mode,

active low

DCL

Master clock input 1536 kHz, synchronous to FSC,

must be available if the SICOFI2/4-TE is operating

µ-Controller interface: chip select enable to read or

write data, active low

DCLK

µ-Controller interface: data clock, shifts data from or

to device, the maximum clock rate is 8192 kHz

PSB2134 Datasheet(PDF) 8 Page - Siemens Semiconductor Group

PSB2134 Datasheet(HTML) 8 Page - Siemens Semiconductor Group

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