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LTC3108

3108fb

The VSTORE capacitor may be of very large value (thou-

sands of microfarads or even Farads), to provide holdup

at times when the input power may be lost. Note that this

capacitor can charge all the way to 5.25V (regardless of

the settings for VOUT), so ensure that the holdup capacitor

has a working voltage rating of at least 5.5V at the tem-

perature for which it will be used. The VSTORE capacitor

can be sized using the following:

[]

≥

−

6μA I

• t • f) • TSTORE

5.25 V

STORE

LDO

BURST

OUT

Where 6μA is the quiescent current of the LTC3108, IQ is

the load on VOUT in between bursts, ILDO is the load on the

LDO between bursts, IBURST is the total load during the

burst, t is the duration of the burst, f is the frequency of

the bursts, TSTORE is the storage time required and VOUT

is the output voltage required. Note that for a programmed

output voltage of 5V, the VSTORE capacitor cannot provide

any beneﬁcial storage time.

To minimize losses and capacitor charge time, all capaci-

tors used for VOUT and VSTORE should be low leakage.

See Table 6 for recommended storage capacitors.

Table 6. Recommended Storage Capacitors

VENDOR

PART NUMBER/SERIES

AVX

www.avx.com

BestCap Series

TAJ and TPS Series Tantalum

Cap-XX

www.cap-xx.com

GZ Series

Cooper/Bussmann

www.bussmann.com/3/PowerStor.html

KR Series

P Series

Vishay/Sprague

www.vishay.com/capacitors

Tantamount 592D

595D Tantalum

150CRZ/153CRV Aluminum

013 RLC (Low Leakage)

Storage capacitors requiring voltage balancing are not

recommended due to the current draw of the balancing

resistors.

PCB Layout Guidelines

Due to the rather low switching frequency of the resonant

converter and the low power levels involved, PCB layout

is not as critical as with many other DC/DC converters.

There are, however, a number of things to consider.

Due to the very low input voltage the circuit may operate

from, the connections to VIN, the primary of the trans-

former and the SW and GND pins of the LTC3108 should

be designed to minimize voltage drop from stray resistance

and able to carry currents as high as 500mA. Any small

voltage drop in the primary winding conduction path will

lower efﬁciency and increase capacitor charge time.

Also, due to the low charge currents available at the out-

puts of the LTC3108, any sources of leakage current on

the output voltage pins must be minimized. An example

board layout is shown in Figure 3.

APPLICATIONS INFORMATION

3108 FO3

VOUT2

VOUT

VIN

VIAS TO GROUND PLANE

VLDO

PGOOD

GND

VOUT2_EN

VS1

VS2

VOUT

VOUT2

VLDO

PGD

VAUX

VSTORE

Figure 3. Example Component Placement

for Two-Layer PC Board (DFN Package)

Design Example 1

This design example will explain how to calculate the

necessary storage capacitor value for VOUT in pulsed load

applications, such as a wireless sensor/transmitter. In these

types of applications, the load is very small for a major-

ity of the time (while the circuitry is in a low power sleep

state), with bursts of load current occurring periodically

during a transmit burst. The storage capacitor on VOUT

supports the load during the transmit burst, and the long

sleep time between bursts allows the LTC3108 to recharge

the capacitor. A method for calculating the maximum rate

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