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LTC3108

3108fb

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC3108 is tested under pulsed load conditions such that TJ ≈

TA. The LTC3108E is guaranteed to meet speciﬁcations from 0°C to 85°C

junction temperature. Speciﬁcations over the –40°C to 125°C operating

junction temperature range are assured by design, characterization and

correlation with statistical process controls. The LTC3108I is guaranteed

over the full –40°C to 125°C operating junction temperature range.

Note that the maximum ambient temperature is determined by speciﬁc

operating conditions in conjunction with board layout, the rated thermal

package thermal resistance and other environmental factors. The junction

temperature (TJ) is calculated from the ambient temperature (TA) and

power dissipation (PD) according to the formula: TJ = TA + (PD • θJA°C/W),

where θJA is the package thermal impedance.

Note 3: Speciﬁcation is guaranteed by design and not 100% tested in

production.

Note 4: Failure to solder the exposed backside of the package to the PC

board ground plane will result in a thermal resistance much higher than

43°C/W.

Note 5: The absolute maximum rating is a DC rating. Under certain

conditions in the applications shown, the peak AC voltage on the C2 pin

may exceed ±8V. This behavior is normal and acceptable because the

current into the pin is limited by the impedance of the coupling capacitor.

ELECTRICAL CHARACTERISTICS The l denotes the speciﬁcations which apply over the full operating

junction temperature range, otherwise speciﬁcations are for TA = 25°C (Note 2). VAUX = 5V, unless otherwise noted.

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Output Voltage

VS1 = VS2 = GND

VS1 = VAUX, VS2 = GND

VS1 = GND, VS2 = VAUX

VS1 = VS2 = VAUX

2.30

3.234

4.018

4.90

2.350

3.300

4.100

5.000

2.40

3.366

4.182

5.10

VOUT Quiescent Current

VOUT = 3.3V, VOUT2_EN = 0V

0.2

μA

VAUX Quiescent Current

No Load, All Outputs Charged

μA

LDO Output Voltage

0.5mA Load

2.134

2.2

2.266

LDO Load Regulation

For 0mA to 2mA Load

0.5

LDO Line Regulation

For VAUX from 2.5V to 5V

0.05

0.2

LDO Dropout Voltage

ILDO = 2mA

100

200

LDO Current Limit

VLDO = 0V

411

VOUT Current Limit

VOUT = 0V

2.8

4.5

VSTORE Current Limit

VSTORE = 0V

2.8

4.5

VAUX Clamp Voltage

Current into VAUX = 5mA

5.25

5.55

VSTORE Leakage Current

VSTORE = 5V

0.1

0.3

μA

VOUT2 Leakage Current

VOUT2 = 0V, VOUT2_EN = 0V

0.1

μA

VS1, VS2 Threshold Voltage

0.4

0.85

1.2

VS1, VS2 Input Current

VS1 = VS2 = 5V

0.01

0.1

μA

PGOOD Threshold (Rising)

Measured Relative to the VOUT Voltage

–7.5

PGOOD Threshold (Falling)

Measured Relative to the VOUT Voltage

–9

PGOOD VOL

Sink Current = 100μA

0.15

0.3

PGOOD VOH

Source Current = 0

2.1

2.2

2.3

PGOOD Pull-Up Resistance

1MΩ

VOUT2_EN Threshold Voltage

VOUT2_EN Rising

0.4

1.3

VOUT2_EN Pull-Down Resistance

5MΩ

VOUT2 Turn-On Time

5μs

VOUT2 Turn-Off Time

(Note 3)

0.15

μs

VOUT2 Current Limit

VOUT = 3.3V

0.15

0.3

0.45

VOUT2 Current Limit Response Time

(Note 3)

350

VOUT2 P-Channel MOSFET On-Resistance

VOUT = 3.3V (Note 3)

1.3

N-Channel MOSFET On-Resistance

C2 = 5V (Note 3)

0.5

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