SE1030W

LightCharger

Final

43-DST-01

§ Rev 1.5 § May 24/02

3 of 9

Functional Description

Amplifier Front-End

The transimpedance front-end amplifies an input

current from a photodetector, at pin TZ_IN, to produce

a differential output voltage with the feedback resistor

Rf determining the level of amplification (see the

functional block diagram on page 1). An automatic

gain control loop varies this resistor, to ensure that

the output from the front-end does not saturate the

output driver stage that follows. This gain control

allows input signals of up to 2.6 mA peak.

The input pin TZ_IN is biased at 1.5 V below the

supply voltage VCC, allowing a photodetector to have

a constant reverse bias by connecting the cathode to

3.3 V. This enables full single rail operation.

The front-end stage has its own supply ground

connection

(VEE2)

to

achieve

optimum

noise

performance and maintain integrity of the high-speed

signal path. The front-end shares the VCC (+3.3 V)

connection with the remainder of the circuitry, which has

a separate ground (VEE1).

Output driver stage

The output driver acts as a buffer stage, capable of

swinging up to 300 mVpk-pk differential into a 100

Ω

load. The small output swings allow ease of use with

low

voltage

post

amplifiers

(e.g.

3.3 V

parts).

Increasing optical input level gives a positive-going

output signal on the OUTP pin.

Automatic Gain Control (AGC)

The AGC circuit monitors the voltages from the output

driver and compares them to an internal reference

level produced via the on-chip bandgap reference

circuit. When this level is exceeded, the gain of the

front-end is reduced by controlling the feedback

resistor Rf.

A long time-constant integrator is used within the

control loop of the AGC with a typical low frequency

cut-off of 5 kHz.

System Block Diagram

Receiver Module

Clock & Data

Recovery

Clock

Data

2

2

2.5 Gb/s

2.5 GHz

2

PIN

SE1030W

2

TZ

Amplifier

SE1230

AGC

Amplifier

LOS