F71872 datasheet(45/115 Pages) FINTEK

45 / 115 page

July, 2007

V0.28P

F71872

2-1 DRATE

These bits indicate the status of the DRATE programmed through the Data

Rate Select Register or Configuration Control Register.

HIGHDEN_N

0: 1Mbps or 500Kbps data rate is chosen.

1: 300Kbps or 250Kbps data rate is chosen.

7.2.3.12 Digital Input Register (Model 30 Mode)

 Base + 7

Bit

Name

R/W Default

Description

DSKCHG_N

This bit indicates the state of DSKCHG# disk interface input.

6-4 Reserved

Reserved.

DMAEN

This bit reflects the DMA bit in Digital Output Register.

NOPRE

This bit reflects the NOPRE bit in Configuration Control Register.

1-0 DRATE

These bits indicate the status of DRATE programmed through the Data Rate

Select Register or Configuration Control Register.

7.2.3.13 Configuration Control Register (PC-AT and PS/2 Mode)

 Base + 7

Bit

Name

R/W Default

Description

7-2 Reserved

Reserved.

1-0 DRATE

These bit determine the data rate of the floppy controller. See DRATE bits in

Data Rate Select Register.

7.2.3.14 Configuration Control Register (Model 30 Mode)

 Base + 7

Bit

Name

R/W Default

Description

7-3 Reserved

Reserved.

NOPRE

This bit could be programmed through Configuration Control Register and be

read through the bit 2 in Digital Input Register in Model 30 Mode. But it has no

functionality.

1-0 DRATE

These bit determine the data rate of the floppy controller. See DRATE bits in

Data Rate Select Register.

7.2.3.15

FDC Commands

Terminology:

Cylinder Number 0 -256

Data Pattern

DIR

Step Direction

0: step out

1: step in

DS0

Drive Select 0

DS1

Drive Select 1

DTL

Data Length

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