DS1886 datasheet(13/92 Pages) MAXIM

13 / 92 page

DS1886

SFP and PON ONU Controller

with Digital LDD Interface

I2C AC ELECTRICAL CHARACTERISTICS

(VCC = +2.97V to +3.63V, TA = -40NC to +95NC, unless otherwise noted. Timing is referenced to VIL(MAX) and VIH(MIN).) (Note 1) (See

Figure 19.)

NONVOLATILE MEMORY CHARACTERISTICS

(VCC = +2.97V to +3.63V, unless otherwise noted.) (Note 1)

Note 1: Limits are production tested at TA = +25°C. Limits over the operating temperature range and relevant supply voltage

range are guaranteed by design and characterization. Typical values are not guaranteed.

Note 2: All voltages are referenced to ground. Current entering the IC is considered positive, and current exiting the IC is consid-

ered negative.

Note 3: Inputs are at supply rail. Outputs are not loaded. Does not include REFIN current. Measured using the Typical Operating

Circuit—GPON ONU.

Note 4: The ADC output is available internally as a 16-bit value. The 16 bits are derived by left-shifting the 13-bit ADC output by 3.

Note 5: Guaranteed by design.

Note 6: TXB (transmit bias) and TXP (transmit power) are separate ADC conversions that are performed on the same input pin, TXMON.

Note 7: Full scale is user-programmable.

Note 8: Time until faults are cleared (falling edge of TXFOUT).

Note 9: Time until rising edge of TXDOUT.

Note 10: Time until falling edge of TXDOUT.

Note 11: Time until completion of initial MAX3710 control registers configuration.

Note 12: Time until completion of initial MAX3945 and MAX3710 control registers configuration.

Note 13: VCC LO alarm or warning is enabled, a VCC conversion is completed, and VCC is above VCC LO alarm or warning. See

Figure 12c.

Note 14: DAC output valid, 3-wire writes from LUTs complete, and digital outputs valid.

Note 15: I2C interface timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C stan-

dard mode.

Note 16: CB = Total capacitance of one bus line in pF.

Note 17: EEPROM write begins after a STOP condition occurs.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCL Clock Frequency

fSCL

(Note 15)

400

kHz

Clock Pulse-Width Low

tLOW

1.3

Clock Pulse-Width High

tHIGH

0.6

Bus Free Time Between STOP and

START Condition

tBUF

1.3

START Hold Time

tHD:STA

0.6

START Setup Time

tSU:STA

0.6

Data in Hold Time

tHD:DAT

0.9

Data in Setup Time

tSU:DAT

100

Rise Time of Both SDA and SCL

Signals

(Note 16)

20 +

0.1CB

300

Fall Time of Both SDA and SCL

Signals

(Note 16)

20 +

0.1CB

300

STOP Setup Time

tSU:STO

0.6

Capacitive Load for Each Bus Line

400

EEPROM Write Time

(Note 17)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

EEPROM Write Cycles

At TA = +25NC

50,000

—

At TA = +85NC

10,000

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