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LTC4290/LTC4271

429071f

DETECTION

Detection Overview

Toavoiddamagingnetworkdevicesthatwerenotdesigned

to tolerate DC voltage, a PSE must determine whether the

connected device is a real PD before applying power. The

IEEEspecificationrequiresthatavalidPDhaveacommon-

mode resistance of 25k ±5% at any port voltage below 10V.

The PSE must accept resistances that fall between 19k and

26.5k, and it must reject resistances above 33k or below

15k (shaded regions in Figure 11). The PSE may choose to

acceptorrejectresistancesintheundefinedareasbetween

the must-accept and must-reject ranges. In particular, the

PSE must reject standard computer network ports, many

of which have 150Ω common-mode termination resistors

that will be damaged if power is applied to them (the black

region at the left of Figure 11).

APPLICATIONS INFORMATION

Figure 11. IEEE 802.3af Signature Resistance Ranges

ing currents are measured and subtracted. Both methods

must report valid resistances for the port to report a valid

detection. PD signature resistances between 17k and 29k

(typically) are detected as valid and reported as Detect

Good in the corresponding Port Status register. Values

outside this range, including open and short circuits, are

also reported. If the port measures less than 1V at the

first forced-current test, the detection cycle will abort and

Short Circuit will be reported. Table 3 shows the possible

detection results.

Table 3. Detection Status

MEASURED PD SIGNATURE

DETECTION RESULT

Incomplete or Not Yet Tested

Detect Status Unknown

< 2.4k

Short Circuit

Capacitance > 2.7µF

CPD too High

2.4k < RPD < 17k

RSIG too Low

17k < RPD < 29k

Detect Good

> 29k

RSIG too High

> 50k

Open Circuit

Voltage > 10V

Port Voltage Outside Detect Range

RESISTANCE

PSE

10k

15k

429071 F11

19k

26.5k

26.25k

23.75k

150 (NIC)

20k

30k

33k

4-Point Detection

The LTC4290/LTC4271 uses a 4-point detection method to

discover PDs. False-positive detections are minimized by

checkingforsignatureresistancewithbothforced-current

and forced-voltage measurements.

Initially, two test currents are forced onto the port (via the

OUTn pin) and the resulting voltages are measured. The

detectioncircuitrysubtractsthetwoV-Ipointstodetermine

the resistive slope while removing offset caused by series

diodes or leakage at the port (see Figure 12). If the forced-

current detection yields a valid signature resistance, two

test voltages are then forced onto the port and the result-

Figure 12. PD Detection

FIRST

DETECTION

POINT

SECOND

DETECTION

POINT

VALID PD

25k SLOPE

275

165

0V-2V

OFFSET

VOLTAGE

429071 F12

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