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LTC4270/ Datasheet(PDF) 24 Page - Linear Technology

Part # LTC4270/
Description  8-Port PoE/PoE PSE Controller
PDF  32 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC4270/ Datasheet(HTML) 24 Page - Linear Technology

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LTC4290/LTC4271
24
429071f
Port Current Policing
The LTC4290/LTC4271 can augment tCUT current monitor-
ing with a policing function to track the one second current
averages. A port violating the user-specified Port Police
Threshold will be shut off with both a tCUT and Police event
recorded. A port current Police event can be differentiated
from a port tCUT violation by reading both events bits; both
bits are set for a Police violation while only the tCUT bit is
set for tCUT timer violations.
Port Voltage Readback
TheLTC4290/LTC4271measurestheoutputvoltageateach
port with an internal A/D converter. Port data is only valid
when the port power is on and reads zero at all other times.
Disconnect
The LTC4290/LTC4271 monitors powered ports to ensure
thePDcontinuestodrawtheminimumspecifiedcurrent.A
disconnecttimercountsupwheneverportcurrentisbelow
7.5mA(typ),indicatingthatthePDhasbeendisconnected.
If the tDIS timer expires, the port will be turned off and the
disconnect bit in the fault event register will be set. If the
current returns before the tDIS timer runs out, the timer
resets. As long as the PD exceeds the minimum current
level more often than tDIS, it will remain powered.
Although not recommended, the DC disconnect feature
can be disabled by clearing the corresponding enable bits.
Note that this defeats the protection mechanisms built
into the IEEE specification, since a powered port will stay
powered after the PD is removed. If the still-powered port
is subsequently connected to a non-PoE data device, the
device may be damaged.
The LTC4290/LTC4271 does not include AC disconnect
circuitry, but includes AC Disconnect Enable bits to main-
tain compatibility with the LTC4259A. If the AC Disconnect
Enable bits are set, DC disconnect will be used.
APPLICATIONS INFORMATION
Masked Shutdown
The LTC4290/LTC4271 provides a low latency port shed-
ding feature to quickly reduce the system load when
required. By allowing a pre-determined set of ports to
be turned off, the current on an overloaded main power
supply can be reduced rapidly while keeping high priority
devices powered. Each port can be configured to high or
low priority; all low-priority ports will shut down within
6.5μs after the MSD pin is pulled low, high priority ports
will remain powered. If a port is turned off via MSD, the
correspondingDetectionandClassificationEnablebitsare
cleared, so the port will remain off until the host explicitly
re-enables detection.
In the LTC4290/LTC4271 chipset the active level of MSD
is register configurable as active high or low. The default
is LTC4266-compatible active low behavior.
VEE Readback
The LTC4290/LTC4271 measures the VEE voltage with an
internal 12-bit A/D converter.
General Purpose IO
Two sets of general purpose IO pins are available in the
LTC4290/LTC4271chipset.Thefirstsetofgeneralpurpose
IO are GP1 and GP0. These fully bidirectional IO are 3.3V
CMOS IO on the LTC4271 chip.
The second set of general purpose IO pins are XIO1 and
XIO0. These fully bidirectional IO are 4.3V CMOS IO on
the LTC4290 chip.
Code Download
LTC4271 firmware is field-upgradable by downloading
and executing RAM images. RAM images are volatile
and must be re-downloaded after each VDD power cycle,
but will remain valid during reset and VEE power events.
Contact Linear Technology for code download procedures
and RAM images.



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