MPC5645S datasheet(142/146 Pages) FREESCALE

142 / 146 page

Qorivva MPC5645S Microcontroller Data Sheet, Rev. 8

142

Freescale Semiconductor

4 (continued)

(24 Jun 2010)

In the 208-pin pinout:

• For pin 68, changed eMIOSA23 to eMIOS0[23].

• For pin 69, changed eMIOSA16 to eMIOS0[16].

• For pin 70, changed eMIOSA15 to eMIOS0[15].

• For pin 71, changed eMIOSA14 to eMIOS0[14].

In the 324-pin pinout:

• Added content to indicate which functions are available only in this package.

• Renamed pin J10 (was VSS_DR, is VSS).

In the “Voltage supply pin descriptions” table:

• Deleted the entry for VSS_DR.

• Added pin J10 to the VSS group in the 324-pin package.

Revised the “Nexus pins” table.

In the “Recommended operating conditions (3.3 V)” table, changed the specification for TVDD (was

0.25 V/

s, is 12 V/ms).

In the “Recommended operating conditions (5.0 V)” table, changed the specification for TVDD (was

0.25 V/

s, is 12 V/ms).

In the “FMPLL electrical characteristics” table, changed footnote 6 (was “fCPU 64 MHz can be achieved

only at up to 105 °C”, is “fCPU of 125 MHz can be achieved only at temperatures up to 105 °C with

a maximum FM depth of 2%.”.)

In the “DC specification for CMOS090LP2 library @ VDDE = 3.3 V” > “DC electrical specifications”

table, deleted the specifications for Vih_pci and Vil_pci.

Revised the “Low power oscillator electrical characteristics” table.

In the “ADC electrical characteristics” table, changed “VDD-0.1” to “VDDE_A–0.1” and “VDD+0.1” to

“VDDE_A+0.1”.

Renamed “QuadSPI2 Timing” to “QuadSPI timing” and added meaningful content.

Added the “TCON/RSDS timing” section.

(25 Feb 2011)

In the “Feature List” section:

• Changed RTC optional clocking from “main“ to “fast“ 4-16 MHz external oscillator.

• Changed CMU monitor feature from “main crystal oscillator“ to “fast (4–16 MHz) external crystal

oscillator”.

In the “Feature details“ section, changed “main oscillator“ to “external oscillator“ in the “System clocks

and clock generation modules“ section.

In the “Pad configuration during reset phases“ section, changed “Main oscillator pads” to “Fast (4-16

MHz oscillator pads“.

In the ““Voltage supply pin descriptions” table, changed VDD_DR function from “DDR SDRAM interface

supply“ to “1.8V, 2.5V, and 3.3V SDRAM supply“

In the “System pin descriptions” table, specified an external capacitor value of 47pF in the footnote.

In the “Functional ports” section, added list of pad types.

In the “Power-up sequencing” section:

• Added list item that specifies VDDE_B and VDD33_DR are to be powered up first.

• Added VDD33_DR to the list of generic I/O or noise-free supplies.

• Added details to VREG HV list item.

• Changed post-list text regarding DDR to be a separate NOTE, and identified the 3.3V supply as

VDD33_DR.

• Added power-up information to the LV supply (VDD12) list item.

• Added “Parameter classification” section and accompanying table.

Added “C” classification column and values to tables throughout the “Electrical characteristics“ section.

Table 74. Revision history (continued)

Revision

(Date)

Description

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