TCM320AC46

GENERALPURPOSE AUDIO INTERFACE FOR DSP

SLWS001 − D4091, JUNE 1993

POST OFFICE BOX 655303

POST OFFICE BOX 1443

7

encoding

The encoder internally samples the output of the transmit filter and holds each sample on an internal

sample-and-hold capacitor. The encoder performs an analog-to-digital conversion on a switched-capacitor

array. Digital data representing the sample is transmitted on the first eight or 16 data clock cycles of the next

frame.

The autozero circuit corrects for dc offset on the input signal to the encoder using the sign-bit averaging

technique. The sign bit from the encoder output is long-term averaged and subtracted from the input to the

encoder.

data word structure

The data word is eight bits long in the companded mode. All eight bits represent one audio data sample. The

sign bit is the first bit transmitted.

The data word is 16 bits long in the linear mode. The first 13 bits comprise the audio data sample, and the last

three bits are volume control in the receive direction (DIN) and zeros in the transmit direction (DOUT). The sign

bit is transmitted first.

receive operation

decoding

In the companded mode, the serial data word is received at DIN on the first eight clock cycles in fixed-data rate

and the last eight clock cycles in variable-data rate. The serial data word is received at DIN on the first 13 clock

cycles in the linear mode. Digital-to-analog conversion is performed, and the corresponding analog sample is

held on an internal sample-and-hold capacitor. This sample is transferred to the receive filter.

receive filter

The receive section of the filter provides pass-band flatness. The filter contains the required compensation for

the (sin x)/x response of such decoders.

receive buffer

The receive buffer contains the volume control.

earphone amplifier

The earphone amplifier has a balanced output to allow maximum flexibility in output configuration. The output

amplifier is designed to directly drive a piezo earphone in the differential configuration without any additional

external components. The output can also be used to drive a single-ended load with the output signal voltage

The receive-channel output level can be adjusted between specified limits by connecting an external resistor

network to EARGS.

receive data format

Eight bits of data are received in the companded mode and are valid. The sign bit is the first bit received (see

Table 2).

Sixteen bits of data are received in the linear mode. The first 13 bits are the D/A code, and the remaining three

bits form the volume control word (see Table 2). The volume control function is actually an attenuation control

where the first bit received is the most significant. The maximum volume occurs when all three volume control

bits are zero. Eight levels of attenuation are selectable in 3-dB steps, giving a maximum attenuation of 21 dB,

when all bits are 1s. The volume control bits are not latched into the device and must be present in each received

data word.