SN54LS224A, SN74LS224A

16

× 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES

WITH 3-STATE OUTPUTS

SDLS023E – JANUARY 1991 – REVISED APRIL 2003

8

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

tPHZ

tPLZ

tPHL

tPLH

0.5 V

tPZL

tPZH

tPLH

tPHL

1.3 V

1.3 V

1.3 V

3 V

3 V

0 V

0 V

th

tsu

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Timing

Input

Data

Input

1.3 V

1.3 V

High-Level

Pulse

Low-Level

Pulse

tw

VOLTAGE WAVEFORMS

PULSE DURATIONS

Output

Control

Out-of-Phase

Output

(see Note C)

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

1.3 V

3 V

3 V

0.3 V

0 V

VOL

VOH

VOH

VOL

Output

Control

(low-level

enabling)

Waveform 1

(see Note B)

Waveform 2

(see Note B)

[1.5 V

VOH

VOL

[1.5 V

In-Phase

Output

0.5 V

1.3 V

1.3 V

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS

LOAD CIRCUIT

S1

(see Note B)

5 k

Ω

S2

VCC

RL

From Output

Under Test

CL

(see Note A)

tPZL

tPZH

tPLZ/tPHZ

tPLH/tPHL

Closed

Open

Closed

Closed

TEST

S1

Open

Closed

Closed

Closed

S2

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses have the following characteristics: PRR

≤ 1 MHz, tr < 15 ns, tf < 6 ns, ZO ≈ 50 Ω.

D. All diodes are 1N916 or 1N3064.

E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuits and Voltage Waveforms