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RT9715CGF Datasheet(PDF) 4 Page - Richtek Technology Corporation |
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RT9715CGF Datasheet(HTML) 4 Page - Richtek Technology Corporation |
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4 / 15 page ![]() RT9715 4 DS9715-03 April 2011 www.richtek.com Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note 2. θJA is measured in the natural convection at TA = 25°C on a low effective single layer thermal conductivity test board of JEDEC 51-3 thermal measurement standard. Note 3. Devices are ESD sensitive. Handling precaution is recommended. Note 4. The device is not guaranteed to function outside its operating conditions. Parameter Symbol Test Conditions Min Typ Max Unit Logic_High Voltage VIH VIN = 2.7V to 5.5V 2 -- -- V EN/EN Threshold Logic_Low Voltage VIL VIN = 2.7V to 5.5V -- -- 0.8 V EN/EN Input Current IEN/EN VEN = 5V -- 0.01 0.1 uA Output Leakage Current ILEAKAGE VEN = 0V, RLOAD = 0Ω -- 0.5 1 uA Output Turn-On Rise Time TON_RISE 10% to 90% of VOUT Rising -- 200 -- us FLG Output Resistance RFLG ISINK = 1mA -- 20 -- Ω FLG Off Current IFLG_OFF VFLG = 5V -- 0.01 1 uA FLG Delay Time TD From fault condition to FLG assertion 5 12 20 ms Shutdown Auto-Discharge Resistance RDischarge VEN = 0V, VEN = 5V -- 100 150 Ω Under-Voltage Lockout VUVLO VIN Rising 1.3 1.7 -- V Under-Voltage Hysteresis ΔVUVLO VIN Decreasing -- 0.1 -- V VOUT > 1V -- 120 -- °C Thermal Shutdown Protection TSD VOUT = 0V -- 100 -- °C Thermal Shutdown Hysteresis VOUT = 0V -- 20 -- °C |
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