AD1855 datasheet(7/15 Pages) AD

7 / 15 page

AD1855

–7–

REV. B

SDATA

INPUT

LSB

MSB–2

MSB–1

LSB+2 LSB+1

MSB–2

MSB–1

MSB

LSB+2

LSB+1

LSB

BCLK

INPUT

RCLK

INPUT

LEFT CHANNEL

RIGHT CHANNEL

MSB

Figure 1. Right-Justified Mode

LEFT CHANNEL

RIGHT CHANNEL

MSB–2

MSB–1

LSB+2

LSB+1

LSB

MSB–2

MSB–1

MSB

LSB+2

LSB+1

LSB

MSB

RCLK

INPUT

BCLK

INPUT

SDATA

INPUT

MSB

Figure 2. I2S-Justified Mode

MSB–2

MSB–1

LSB+2

LSB+1

LSB

MSB–2

MSB–1

MSB

LSB+2

LSB+1

LSB

MSB–1

MSB

RCLK

INPUT

BCLK

INPUT

SDATA

INPUT

LEFT CHANNEL

RIGHT CHANNEL

MSB

Figure 3. Left-Justified Mode

SDATA

INPUT

MSB–1

LSB+2

LSB+1

LSB

MSB–1

LSB+2

LSB+1

LSB

MSB

MSB–1

MSB

RCLK

INPUT

LEFT CHANNEL

RIGHT CHANNEL

BCLK

INPUT

MSB

Figure 4. Left-Justified DSP Mode

RCLK

INPUT

LEFT CHANNEL

RIGHT CHANNEL

BCLK

INPUT

SDATA

INPUT

LSB

MSB–1MSB–2

LSB+2

LSB+1

LSB

MSB

MSB–1

MSB–2

LSB+2

LSB+1

LSB

MSB

MSB–1

MSB

Figure 5. 32

× FS Packed Mode

AD1855 Datasheet(PDF) 7 Page - Analog Devices

AD1855 Datasheet(HTML) 7 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Datasheet Download

Link URL