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AD1955 Datasheet(PDF) 3 Page - Analog Devices

Part # AD1955
Description  High Performance Multibit DAC with SACD Playback
PDF  10 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD1955 Datasheet(HTML) 3 Page - Analog Devices

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AD1955
Rev. PrF
-3-
PRELIMINARY TECHNICAL DATA
TEMPERATURE RANGE
Min
Typ
Max
Units
Specifications Guaranteed
25
OC
Functionality Guaranteed
-40
105
OC
Storage
-55
125
OC
Specifications subject to change without notice
POWER
Min
Typ
Max
Units
Supplies
Voltage, Digital
4.50
5
5.50
V
Voltage, Analog
4.50
5
5.50
V
Analog Current
17
mA
Analog Current - Reset
17
mA
Digital Current
22
mA
Digital Current - Reset
2
mA
Dissipation
Operation - Both Supplies
195
mW
Operation - Analog Supply
85
mW
Operation - Digital Supply
110
mW
Power Supply Rejection Ratio
1kHz 300 mV p-p Signal at Analog Supply Pins
-77
dB
20kHz 300 mV p-p Signal at Analog Supply Pins
-72
dB
Specifications subject to change without notice
DIGITAL FILTER CHARACTERISTICS
Sample Rate (kHz)
Passband (kHz)
Stopband (kHz)
Stopband Attenuation (dB)
Passband Ripple (dB)
44.1
DC-20
24.1-328.7
110
+/- 0.0002
48
DC-21.8
26.23-358.28
110
+/- 0.0002
96
DC-39.95
56.9-327.65
115
+/- 0.0005
192
DC-87.2
117-327.65
95
+0/-0.04 (DC-21.8 kHz)
+0/-0.5 (DC-65.4 kHz)
+0/-1.5 (DC-87.2 kHz)
Specifications subject to change without notice
GROUP DELAY
Chip Mode
Group Delay Calculation
Fs
Group Delay
Units
INT8x Mode
5553/(128 × FS)
48kHz
903.8
µs
INT4x Mode
5601/(64 × FS)
96kHz
911.6
µs
INT2x Mode
5659/(32 × FS)
192kHz
921
µs
Specifications subject to change without notice
DIGITAL TIMING (Guaranteed over -40°C to 85°C, AVDD = DVDD = +5.0 V +/- 10%)
Min
Units
tDMP
MCLK Period (FMCLK = 256*FLRCLK)
54
ns
tDML
MCLK LO Pulse Width (all modes)
0.4 X tDMP
ns
tDMH
MCLK HI Pulse Width (all modes)
0.4 X tDMP
ns
tDBH
BCLK HI Pulse Width
20
ns
tDBL
BCLK LO Pulse Width
20
ns
tDBP
BCLK Period
60
ns
tDLS
LRCLK Setup
20
ns
tDLH
LRCLK Hold (DSP Serial Port mode only)
5
ns
tDDS
SDATA Setup
5
ns
tDDH
SDATA Hold
10
ns
tDMP
CCLK Period
50
ns
tDML
CCLK LO Pulse Width
15
ns
tDMH
CCLK HI Pulse Width
15
ns
tCLS
CLATCH Setup
10
ns
tCLH
CLATCH Hold
10
ns
tCDS
CDATA Setup
10
ns
tCDH
CDATA Hold
10
ns
tRSTL
RST LO Pulse Width
15
ns
Specifications subject to change without notice.



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