ACE5372

Low Power Real-Time Clock (RTC)

VER 1.3

10

6. Control Register 1 (at internal address EH)

D7

D6

D5

D4

D3

D2

D1

D0

Operation

AALE

BALE

SL2

SL1

TEST

CT2

CT1

CT0

Write

AALE

BALE

SL2

SL1

TEST

CT2

CT1

CT0

Read

0

0

0

0

0

0

0

0

Default

*The default means read value when XSTP bit is set

to “1” by starting up from 0V, or supply voltage drop, etc.

AALE , BALE

ALARM-A, ALARM-B enable bits

AALE，BALE

Description

Operation

0

ALARM-A，ALARM-B correspondence action invalid

Default

1

ALARM-A，ALARM-B correspondence action valid

L2, SL1

Interrupt output select bits

SL2

SL1

Description

Operation

0

0

Outputs ALARM-A, ALARM-B, INT to the INTRA. Outputs 32K clock pulses to

the INTRB.

Default

0

1

Outputs ALARM-A, INT to the INTRA. Outputs 32K clock pulses, ALARM-B to

the INTRB.

1

0

Outputs ALARM-A, ALARM-B to the INTRA. Outputs 32K clock pulses, INT to

the INTRB.

1

1

Outputs ALARM-A to the INTRA. Outputs 32K clock pulses, ALARM-B, INT to

the INTRB.

By setting SL1 and SL2 bits, two alarm pulses (ALARM-A, ALARM-B), periodic interrupt output (INT),

32K clock pulses may be output to the INTRA or INTRB pins selectively.

TEST

ACE5372 Test bit

TEST

Description

Operation

0

Ordinary operation mode

Default

1

Test mode