REV. 0

AD5303/AD5313/AD5323

–14–

AD5303/AD5313/AD5323 to 80C51/80L51 Interface

Figure 35 shows a serial interface between the AD5303/AD5313/

AD5323 and the 80C51/80L51 microcontroller. The setup for

the interface is as follows: TXD of the 80C51/80L51 drives

SCLK of the AD5303/AD5313/AD5323, while RXD drives the

serial data line of the part. The SYNC signal is again derived

from a bit programmable pin on the port. In this case port line

P3.3 is used. When data is to be transmitted to the AD5303/

AD5313/AD5323, P3.3 is taken low. The 80C51/80L51 trans-

mits data only in 8-bit bytes; thus only eight falling clock edges

occur in the transmit cycle. To load data to the DAC, P3.3 is

left low after the first eight bits are transmitted, and a second

write cycle is initiated to transmit the second byte of data. P3.3

is taken high following the completion of this cycle. The 80C51/

80L51 outputs the serial data in a format that has the LSB first.

The AD5303/AD5313/AD5323 requires its data with the MSB

as the first bit received. The 80C51/80L51 transmit routine

should take this into account.

DIN

SCLK

SYNC

P3.3

TXD

RXD

80C51/80L51*

*ADDITIONAL PINS OMITTED FOR CLARITY.

AD5303/

AD5313/

AD5323*

Figure 35. AD5303/AD5313/AD5323 to 80C51/80L51

Interface

AD5303/AD5313/AD5323 to MICROWIRE Interface

Figure 36 shows an interface between the AD5303/AD5313/

AD5323 and any MICROWIRE compatible device. Serial data

is shifted out on the falling edge of the serial clock and is clocked

into the AD5303/AD5313/AD5323 on the rising edge of the SK.

DIN

SCLK

SYNC

CS

SK

SO

MICROWIRE*

*ADDITIONAL PINS OMITTED FOR CLARITY.

AD5303/

AD5313/

AD5323*

Figure 36. AD5303/AD5313/AD5323 to MICROWIRE

Interface

APPLICATIONS INFORMATION

Typical Application Circuit

The AD5303/AD5313/AD5323 can be used with a wide range

of reference voltages, especially if the reference inputs are con-

figured to be unbuffered, in which case the devices offer full,

one-quadrant multiplying capability over a reference range of

More typically, the AD5303/AD5313/AD5323 may be used

with a fixed, precision reference voltage. Figure 37 shows a

typical setup for the AD5303/AD5313/AD5323 when using an

external reference. If the reference inputs are unbuffered, the

reference buffers are used, the reference range is reduced. Suit-

able references for 5 V operation are the AD780 and REF192

(2.5 V references). For 2.5 V operation, a suitable external

reference would be the REF191, a 2.048 V reference.

1 F

SCLK

DIN

SYNC

GND

EXT

REF

AD780/REF192

OR REF191 WITH

SERIAL

INTERFACE

BUF A BUF B

AD5303/

AD5313/

AD5323

Figure 37. AD5303/AD5313/AD5323 Using External

Reference

inputs are configured as unbuffered (for example 0 V to +5 V)

then the simplest solution is to connect the reference inputs to

then the AD5303/AD5313/AD5323 may be powered from the

reference voltage, for example using a 5 V reference such as the

REF195, as shown in Figure 38. The REF195 will output a

steady supply voltage for the AD5303/AD5313/AD5323. The

current required from the REF195 is 300

µA supply current and

approximately 30

µA or 60 µA into each of the reference inputs

(if unbuffered). This is with no load on the DAC outputs. When

the DAC outputs are loaded, the REF195 also needs to supply

the current to the loads. The total current required (with a 10 k

Ω

load on each output) is:

360

µA + 2 (5 V/10 kΩ) = 1.36 mA

The load regulation of the REF195 is typically 2 ppm/mA,

which results in an error of 2.7 ppm (13.5

µV) for the 1.36 mA

current drawn from it. This corresponds to a 0.0007 LSB error

at 8 bits and 0.011 LSB error at 12 bits.

1 F

+15V

GND

REF195

0.1 F

10 F

SCLK

DIN

SYNC

SERIAL

INTERFACE

GND

BUF A BUF B

AD5303/

AD5313/

AD5323

Figure 38. Using an REF195 as Power and Reference to the

AD5303/AD5313/AD5323