AD5313 datasheet(15/18 Pages) AD

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REV. 0

AD5303/AD5313/AD5323

–15–

Bipolar Operation Using the AD5303/AD5313/AD5323

The AD5303/AD5313/AD5323 has been designed for single

supply operation, but bipolar operation is also achievable using

the circuit shown in Figure 39. The circuit shown has been

configured to achieve an output voltage range of –5 V < VOUT <

+5 V. Rail-to-rail operation at the amplifier output is achievable

using an AD820 or OP295 as the output amplifier.

1 F

VREFA/B

VDD

VOUTA/B

0.1 F

10 F

VDD = +5V

AD820/

OP295

+5V

10k

SCLK

DIN

SYNC

GND

SERIAL

INTERFACE

BUF A BUF B

AD5303/

AD5313/

AD5323

VOUT

VIN

GND

REF195

–5V

+6V TO +16V

Figure 39. Bipolar Operation Using the AD5303/AD5313/

AD5323

The output voltage for any input code can be calculated as

follows:

VOUT = [(VREF

× D/2N) × (R1+R2)/R1 – VREF × (R2/R1)]

where:

D is the decimal equivalent of the code loaded to the DAC and

N is the DAC resolution.

VREF is the reference voltage input, and gain bit = 0.

with:

VREF = 5 V

R1 = R2 = 10 k

Ω and VDD = 5 V

VOUT = (10

× D/2N) – 5 V

Opto-Isolated Interface for Process Control Applications

The AD5303/AD5313/AD5323 has a versatile 3-wire serial

interface making it ideal for generating accurate voltages in

process control and industrial applications. Due to noise, safety

requirements or distance, it may be necessary to isolate the

AD5303/AD5313/AD5323 from the controller. This can easily

be achieved by using opto-isolators, which will provide isolation

in excess of 3 kV. The serial loading structure of the AD5303/

AD5313/AD5323 makes it ideally suited for use in opto-isolated

applications. Figure 40 shows an opto-isolated interface to the

AD5303/AD5313/AD5323 where DIN, SCLK and SYNC are

driven from opto-couplers. The power supply to the part also

needs to be isolated. This is done by using a transformer. On

the DAC side of the transformer, a +5 V regulator provides the

+5 V supply required for the AD5303/AD5313/AD5323.

VDD

SCLK

10k

VREFA

DIN

SYNC

VDD

GND

VOUTA

0.1 F

10 F

BUF A BUF B

VREFB

VOUTB

SCLK

+5V

REGULATOR

POWER

VDD

SYNC

10k

VDD

DIN

10k

AD5303/

AD5313/

AD5323

Figure 40. AD5303/AD5313/AD5323 in an Opto-Isolated

Interface

Decoding Multiple AD5303/AD5313/AD5323s

The SYNC pin on the AD5303/AD5313/AD5323 can be used

in applications to decode a number of DACs. In this applica-

tion, all the DACs in the system receive the same serial clock

and serial data, but only the SYNC to one of the devices will be

active at any one time, allowing access to two channels in this

8-channel system. The 74HC139 is used as a 2-to-4 line de-

coder to address any of the DACs in the system. To prevent

timing errors from occurring, the enable input should be brought

to its inactive state while the coded address inputs are changing

state. Figure 41 shows a diagram of a typical setup for decoding

multiple AD5303/AD5313/AD5323 devices in a system.

74HC139

VCC

VDD

ENABLE

CODED

ADDRESS

DGND

SYNC

DIN

SCLK

1Y0

1Y1

1Y2

1Y3

SYNC

DIN

SCLK

SYNC

DIN

SCLK

SYNC

DIN

SCLK

DIN

AD5303/

AD5313/

AD5323

AD5303/

AD5313/

AD5323

AD5303/

AD5313/

AD5323

AD5303/

AD5313/

AD5323

Figure 41. Decoding Multiple AD5303/AD5313/AD5323

Devices in a System

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