PCA9539APW datasheet(15/39 Pages) NXP

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PCA9539A

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Product data sheet

Rev. 1 — 26 September 2012

15 of 39

NXP Semiconductors

PCA9539A

Low voltage 16-bit I2C-bus I/O port with interrupt and reset

8.2 Power-on reset requirements

In the event of a glitch or data corruption, PCA9539A can be reset to its default conditions

by using the power-on reset feature. Power-on reset requires that the device go through a

power cycle to be completely reset. This reset also happens when the device is

powered on for the first time in an application.

The two types of power-on reset are shown in Figure 15 and Figure 16.

Table 13 specifies the performance of the power-on reset feature for PCA9539A for both

types of power-on reset.

Fig 13. High value resistor in parallel with

the LED

Fig 14. Device supplied by a lower voltage

002aag164

LED

VDD

100 kΩ

VDD

002aag165

LED

VDD

3.3 V

5 V

Fig 15. VDD is lowered below 0.2 V or to 0 V and then ramped up to VDD

Fig 16. VDD is lowered below the POR threshold, then ramped back up to VDD

002aah329

VDD

time

ramp-up

ramp-down

(dV/dt)r

(dV/dt)f

re-ramp-up

(dV/dt)r

time to re-ramp

when VDD drops

below 0.2 V or to VSS

td(rst)

002aah330

VDD

time

ramp-down

(dV/dt)f

ramp-up

(dV/dt)r

time to re-ramp

when VDD drops

to VPOR(min) − 50 mV

td(rst)

VI drops below POR levels

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