AD7804 datasheet(17/28 Pages) AD

17 / 28 page

AD7804/AD7805/AD7808/AD7809

–17–

REV. A

Table VII shows the twos complement transfer function for the

Sub DAC. Figure 23 shows the Sub DAC transfer function for

twos complement coding. Any Sub DAC output voltage can be

expressed as:

VOUT" = VBIAS/16

× (NB/256)

where NB is the decimal equivalent of the twos complement

input code. NB ranges from –128 to +127.

Table VII. Twos Complement Code Table for Sub DAC

Digital Input

Analog Input

MSB . . . LSB

01111111

(VBIAS/16)

× (127/256)

01111111

(VBIAS/16)

× (126/256)

00000001

(VBIAS/16)

× (1/256)

00000000

11111111

(–VBIAS/16)

× (1/256)

10000001

(–VBIAS/16)

× (127/256)

10000000

(–VBIAS/16)

× (128/256)

127

VBIAS

256

128

VBIAS

256

DAC INPUT CODE

Figure 23. Sub DAC Output Voltage vs. DAC Input Codes

(HEX) for Twos Complement Coding

The total output for a single channel when using twos comple-

ment coding is the sum of the voltage from the Main DAC and

the Sub DAC.

VOUT = VOUT' + VOUT"

= VBIAS + 1.875

× V

BIAS

× (NA/1024) + V

BIAS/16

× (NB/256)

= VBIAS

× (1 + 1.875 × NA/1024 + NB/4096)

where NA ranges from –512 to +511 and NB ranges from –128 to

+127. Figure 28 shows a pictorial view of the transfer function for

any DAC.

Configuring the AD7805/AD7809 for Twos Complement Coding

Figure 24 shows a typical configuration for the AD7805/AD7809.

The circuit can be used for either 3.3 V or 5 V operation and uses

the internal VDD/2 as the reference for the part and 10-bit paral-

lel interfacing is used. The following are the steps required to

operate the Main DACs in this part.

0.01 F

AD7805/

AD7809

AVDD

DVDD

VOUTA

VOUTB

VOUTC

VOUTD

AGND

DGND

LDAC

CLR

COMP

MODE

DVDD

REFIN

REFOUT

0.1 F

10 F

0.01 F

A2*

*USED ON THE

AD7809 ONLY

DIGITAL

INTERFACE

+3.3V/+5V

Figure 24. Typical Configuration for AD7805/AD7809

System Control Register Write:

MODE = 0, address inputs (A2, A1, A0) are don’t cares.

Write 020 Hex

Configure part for 10-bit parallel, twos

complement coding, normal operation

Channel Control Register Write:

MODE = 0, address inputs (A2, A1, A0) select desired channel.

Write 011 Hex

Internal VDD/2 selected as VBIAS for

DAC, and any DAC data writes that

follow are to the Main DAC.

DAC Data Register Write:

MODE = 1, address inputs (A2, A1, A0) select desired channel.

Write XXX Hex

With MODE = 1 all data writes are to

the selected DAC. XXX is the required

data. 200 Hex will give zero scale and 1FF

Hex will give full scale from the DAC.

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