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MIPSZ2012D1R0 Datasheet(PDF) 25 Page - Panasonic Semiconductor |
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MIPSZ2012D1R0 Datasheet(HTML) 25 Page - Panasonic Semiconductor |
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25 / 48 page  25 AN30183A Ver. AEB Note) The characteristics listed below are reference values derived from the design of the IC and are not guaranteed. OPERATION 1. I2C-bus Interface a.) Basic Rules b.) START and STOP conditions START condition STOP condition SDA SCL acknowledgement signal from slave acknowledgement signal from receiver START or repeated START condition STOP or repeated START condition SCL SDA MSB ACK ACK 12 7 8 9 1 2 3 – 8 9 Sr or P Sr P S or Sr This IC, I2C-bus, is designed to correspond to the Standard-mode (100 kbps) and Fast-mode(400 kbps) devices in the version 2.1 of NXP's specification. However, it does not correspond to the HS-mode (to 3.4 Mbps). This IC will operate as a slave device in the I2C- bus system. This IC will not operate as a master device. The program operation check of this IC has not been conducted on the multi-master bus system and the mix- speed bus system, yet. The connected confirmation of this IC to the CBUS receiver also has not been checked. Please confirm with our company if the IC will be used in these mode systems. The I2C is the brand of NXP. A High to Low transition on the SDA line while SCL is High is one such unique case. This situation indicates START condition. A Low to High transition on the SDA line while SCL is High defines STOP condition. START and STOP conditions are always generated by the master. After START condition occur, the bus will be busy. The bus is considered to be free again a certain time after the STOP condition. Every byte put on the SDA line must be 8-bits long. The number of bytes that can be transmitted per transfer is unrestricted. Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB) first. d1.) When Sub address is not specified d2.) When Sub address is specified Ex) When writing data into address and reading data from "01 h". Sub-address should be assigned first. Stop Condition Ack Start Condition Write mode : 0 Data Byte Sub Address Slave Address A P A A W S Stop condition Ack Start Condition Read mode : 1 Data byte Slave Address P A A R S Data Byte Sub Address 01h Slave Address AP A A 0 S AP Data Byte Slave Address A 1 S Write Read Stop Condition Acknowledge Bit Start Condition Write Mode : 0 Repeated Start Condition Read Mode : 1 Ack Ack Data Byte Slave Address Sub Address Slave Address S AP A A 1 A 0 S d.) Data format 1 1 A6 6Fh x 1 1 0 0 1 1 High 6Eh Hex 1 A5 x R/W 1 A1 0 A3 0 0 1 Low A0 A2 A4 Pin ASEL Slave Address Write mode Read mode When data is read without assigning sub-address, it is possible to read the value of sub-address specified in Write mode immediately before. |
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