–12–

REV. 0

ADP3405

For the lowest ripple and best efficiency, use a 0.1

µF, ceramic

capacitor for the charge pump flying capacitor (CAP+ and CAP–).

A good quality dielectric, such as X7R is recommended.

Setting the Charger Turn-On Threshold

The ADP3405 can be turned on when the charger input exceeds

a programmable threshold voltage. The charger’s threshold and

hysteresis are set by selecting the values for R1 and R2 shown in

Figure 2.

The turn-on threshold for the charger is calculated using:

V

RR

RR

RV

CHR

HYS

HYS

T

=

+

×

×









+

















×

2

2

11

CHRON hysteresis resistance.

The hysteresis is determined using:

V

V

R

R

HYS

T

HYS

=× 1

Combining the above equations and solving for R1 and R2 gives

the following formulas:

R

R

V

V

HYS

T

HYS

1

=×

R

RR

V

V

RR

HYS

CHR

T

HYS

2

1

11

=

×

−









×−

Example: R1 = 10 k

Ω and R2 = 30.2 kΩ gives a charger thresh-

old (not counting the drop in the power Schottky diode) of

3.5 V

± 160 mV with a 200 mV ± 30 mV hysteresis.

Charger Diode Selection

The diode shown in Figure 2 is used to prevent the battery from

discharging into the charger turn-on setting resistors, R1 and R2.

A Schottky diode is recommended to minimize the voltage differ-

ence from the charger to the battery and the power dissipation.

Choose a diode with a current rating high enough to handle both

the battery charging current and the current the ADP3405 will

draw if powered up during charging. The battery charging current

is dependent on the battery chemistry and the charger circuit.

The ADP3405 current will be dependent on the loading.

Printed Circuit Board Layout Considerations

Use the following general guidelines when designing printed

circuit boards:

1. Split the battery connection to the VBAT and SIMBAT

pins of the ADP3405. Use separate traces for each connection

and locate the input capacitors as close to the pins as possible.

2. SIM input and output capacitors should be returned to the

SIMGND and kept as close as possible to the ADP3405 to

minimize noise. Traces to the SIM charge pump capacitor

should be kept as short as possible to minimize noise.

3. VCCA and VTCXO capacitors should be returned to AGND.

4. VCC and VRTC capacitors should be returned to DGND.

5. Split the ground connections. Use separate traces or planes

for the analog, digital, and power grounds, and tie them

together at a single point, preferably close to the battery return.

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

28-Lead Thin Shrink Small Outline (TSSOP)

(RU-28)

0.177 (4.50)

0.169 (4.30)

28

15

14

1

0.386 (9.80)

0.378 (9.60)

0.256 (6.50)

0.246 (6.25)

PIN 1

SEATING

PLANE

0.006 (0.15)

0.002 (0.05)

0.0118 (0.30)

0.0075 (0.19)

0.0256 (0.65)

BSC

0.0433 (1.10)

MAX

0.0079 (0.20)

0.0035 (0.090)

0.028 (0.70)

0.020 (0.50)

8

0