ADUC836 datasheet(43/80 Pages) AD

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REV. A

ADuC834

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PSMCON

Power Supply Monitor Control Register

SFR Address

DFH

Power-On Default Value

DEH

Bit Addressable

POWER SUPPLY MONITOR

As its name suggests, the Power Supply Monitor, once enabled,

monitors both supplies (AVDD or DVDD) on the ADuC834. It will

indicate when any of the supply pins drop below one of four

user-selectable voltage trip points from 2.63 V to 4.63 V. For

correct operation of the Power Supply Monitor function, AVDD

must be equal to or greater than 2.7 V. Monitor function is

controlled via the PSMCON SFR. If enabled via the IEIP2 SFR,

the monitor will interrupt the core using the PSMI bit in the

PSMCON SFR. This bit will not be cleared until the failing power

supply has returned above the trip point for at least 250 ms. This

monitor function allows the user to save working registers to avoid

possible data loss due to the low supply condition, and also

ensures that normal code execution will not resume until a safe

supply level has been well established. The supply monitor is also

protected against spurious glitches triggering the interrupt circuit.

Table XX. PSMCON SFR Bit Designations

Bit

Name

Description

CMPD

DVDD Comparator Bit.

This is a read-only bit and directly reflects the state of the DVDD comparator.

Read 1 indicates the DVDD supply is above its selected trip point.

Read 0 indicates the DVDD supply is below its selected trip point.

6CMPA

AVDD Comparator Bit.

This is a read-only bit and directly reflects the state of the AVDD comparator.

Read 1 indicates the AVDD supply is above its selected trip point.

Read 0 indicates the AVDD supply is below its selected trip point.

PSMI

Power Supply Monitor Interrupt Bit.

This bit will be set high by the MicroConverter if either CMPA or CMPD are low, indicating low

analog or digital supply. The PSMI bit can be used to interrupt the processor. Once CMPD and/or

CMPA return (and remain) high, a 250 ms counter is started. When this counter timesout, the

PSMI interrupt is cleared. PSMI can also be written by the user. However, if either comparator

output is low, it is not possible for the user to clear PSMI.

TPD1

DVDD Trip Point Selection Bits.

TPD0

These bits select the DVDD trip point voltage as follows:

TPD1

TPD0

Selected DVDD Trip Point (V)

4.63

3.08

2.93

2.63

TPA1

AVDD Trip Point Selection Bits.

TPA0

These bits select the AVDD trip point voltage as follows:

TPA1TPA0

Selected AVDD Trip Point (V)

4.63

3.08

2.93

2.63

PSMEN

Power Supply Monitor Enable Bit.

Set to 1 by the user to enable the Power Supply Monitor Circuit.

Cleared to 0 by the user to disable the Power Supply Monitor Circuit.

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