ADV7172 datasheet(29/59 Pages) AD

29 / 59 page

ADV7172/ADV7173

–29–

REV. A

MODE REGISTER 3 MR3 (MR37–MR30)

(Address (SR4–SR0) = 03H)

Mode Register 3 is an 8-bit-wide register. Figure 47 shows the

various operations under the control of Mode Register 3.

MR3 BIT DESCRIPTION

Revision Code (MR31–MR30)

This bit is read-only and indicates the revision of the device.

VBI Pass-Through Control (MR32)

This bit determines whether or not data in the vertical blanking

interval (VBI) is output to the analog outputs or blanked. Note

that this condition is also valid in timing slave mode 0.

Teletext Enable (MR33)

This bit must be set to “1” to enable teletext data insertion on

the TTX pin.

Teletext Mode Control (MR34)

This bit enables switching of the teletext request signal from a

continuous high signal (MR34 = “0”) to a bit wise request

signal (MR34 = “1”).

Closed Captioning Field Control (MR36–MR35)

These bits control the fields that closed captioning data is dis-

played on. Closed captioning information can be displayed on

an odd field, even field or both fields.

Active Video Filter Switching (MR37)

This bit, controls the filter mode applied outside the active

video portion of the line. This filter ensures that the sync rise

and fall times are always on spec regardless of which luma filter

is selected.

MR31

MR30

MR37

MR32

MR34

MR33

MR35

MR36

MR31

MR30

RESERVED FOR

REVISION CODE

VBI OPEN

DISABLE

ENABLE

MR32

TTX BIT REQUEST

MODE CONTROL

DISABLE

ENABLE

MR34

TELETEXT

CONTROL

DISABLE

ENABLE

MR33

ACTIVE VIDEO

FILTER CONTROL

ENABLE

DISABLE

MR37

CLOSED CAPTIONING

FIELD SELECTION

NO DATA OUT

ODD FIELD ONLY

EVEN FIELD ONLY

DATA OUT

(BOTH FIELDS)

MR36

MR35

Figure 47. Mode Register 3 (MR3)

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