ADS4245 datasheet(49/66 Pages) TI

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CLKP

CLKM

0.1 F

CMOS

ClockInput

Device

0.1 F

VCM

CLKP

VCM

5kW

2pF

20 W

2nH

PKG

1pF

BOND

100 W

ESR

CLKM

C ock

Bufe

f r

20 W

2nH

PKG

1pF

BOND

100 W

ESR

ADS42B49

www.ti.com

SBAS558B – DECEMBER 2012 – REVISED JANUARY 2013

NOTE: CEQ is 1 pF to 3 pF and is the equivalent input capacitance of the clock buffer.

Figure 56. Internal Clock Buffer

A single-ended CMOS clock can be ac-coupled to the CLKP input, with CLKM connected to ground with a 0.1-

μF

capacitor, as shown in Figure 57. For best performance, the clock inputs must be driven differentially, thereby

reducing susceptibility to common-mode noise. For high input frequency sampling, TI recommends using a clock

source with very low jitter. Band-pass filtering of the clock source can help reduce the effects of jitter. There is no

change in performance with a non-50% duty cycle clock input.

Figure 57. Single-Ended Clock Driving Circuit

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ADS4245 Datasheet(PDF) 49 Page - Texas Instruments

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