TPS61310 datasheet(21/57 Pages) TI

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STRB0

AF ASSIST LIGHT

STROBE

STRB1

TIMER

DURATION < STIM

LED CONTROL

DC LIGHT

FLASH

LED OFF

TPS61310, TPS61311

www.ti.com

SLVS978C – MARCH 2010 – REVISED NOVEMBER 2012

For video lighting, a watchdog timer is implemented; this must be refreshed within 13.0 seconds. This function

can be disabled, as described below.

MODE_CTRL[1:0] = 01

The STRB0, STRB1 inputs are disabled. The device regulates the LED current in

video light mode (DCLC bits) regardless of the STRB0, STRB1 inputs and the

START_FLASH/TIMER (SFT) bit. To avoid device shutdown because of the video

light safety timeout, MODE_CTRL[1:0] must be refreshed within less than 13.0

seconds (STRB1 = 0). The video light watchdog timer can be disabled by pulling the

STRB1 signal high.

MODE_CTRL[1:0] = 10

The STRB0, STRB1 inputs are enabled. The flash pulse can be triggered by these

synchronization signals, or by a software command (START_FLASH/TIMER (SFT)

bit). The LEDs are enabled/disabled according to the STRB0, STRB1 input. The

flash safety timer is activated, and the video light watchdog timer is disabled.

The dual-wire camera-module interface STRB0 and STRB1 inputs are used for selecting the video light (STRB1

= 1) or flash (STRB1 = 0) mode. The STRB0 signal then triggers the video light or flash, depending on the state

of STRB1. The STT bit defines if the flash trigger is level sensitive (STT = 0), or fired on the rising edge (STT =

1).

Level-Sensitive Flash Trigger (STT = 0)

In this mode, the high-power LEDs are driven at the flash-current level and the safety timer (STIM) is running.

The maximum duration of the flash pulse is defined in the STIM[2:0] register.

The safety timer is triggered on rising edge and stopped by a negative logic on the synchronization source

(STRB0, STRB1 = 0) or by a timeout event (TO bit).

Figure 39. Hardware Synchronized Video Light and flash Strobe

Rising-Edge Flash Trigger (STT = 1)

In this mode, the high-power LEDs are driven at the flash current level and the safety timer (STIM) is running.

The duration of the flash pulse is defined in the STIM[2:0] register.

The flash strobe is started either by a rising edge on the synchronization source (STRB0 = 1, STRB1 = 0) or by a

positive transition on the START-FLASH/TIMER (SFT) bit (STRB0 = 1, STRB1 = 0). Once running, the timer

ignores all kind of triggering signals and only stops after a timeout (TO). START-FLASH/TIMER (SFT) bit is being

reset by the timeout (TO) signal.

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