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AD8362 Datasheet(PDF) 13 Page - Analog Devices |
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AD8362 Datasheet(HTML) 13 Page - Analog Devices |
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13 / 36 page ![]() AD8362 Rev. B | Page 13 of 36 TIME ( µs) 0 0 3.0 210 14 20 4.0 4.5 5.0 2.0 3.5 2.5 1.5 1.0 0.5 –14 –2 2 4 6 –6 0 –4 –8 –10 –12 812 18 16 46 –30dBm +2dBm –10dBm –20dBm 2V/DIV 0.5V/DIV POWER- DOWN PIN VOUT Figure 32. Output Response Using Power-Down Mode for Various RF Input Levels, Carrier Frequency 900 MHz, CLPF = 0 TIME (ms) 0 0 3.0 210 14 20 4.0 4.5 5.0 2.0 3.5 2.5 1.5 1.0 0.5 –14 –2 2 4 6 –6 0 –4 –8 –10 –12 812 18 16 46 2V/DIV –30dBm +2dBm –10dBm –20dBm 0.5V/DIV Figure 33. Output Response Using Power-Down Mode for Various RF Input Levels, Carrier Frequency 900 MHz, CLPF = 0.1 µF TIME (ms) 0 0 3.5 210 14 20 4.5 5.0 5.5 2.5 4.0 3.0 2.0 1.5 1.0 –14 –2 2 4 6 –6 0 –4 –8 –10 –12 812 18 16 46 VPOS 2V/DIV 1V/DIV +2dBm –10dBm –20dBm –30dBm Figure 34. Output Response to Gating on Power Supply for Various RF Input Levels, Carrier Frequency 900 MHz, CLPF = 0 0 180 30 330 60 90 270 300 120 240 150 210 Figure 35. Input Impedance, ZO = 50 Ω, Differential Drive TEMPERATURE (°C) –30 –40 –15 –30 –20 –10 0 10 20 30 40 50 70 80 90 –10 –5 –20 –25 60 0 5 Figure 36. Change in VREF vs. Temperature, 3 Sigma to Either Side of Mean VREF (V) 0 200 300 100 250 150 50 1.230 1.270 1.235 1.240 1.245 1.250 1.260 1.255 1.265 Figure 37. VREF Distribution |
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