LTP5900 Mote Datasheet

Dust Networks

11

Figure 5

Operation of TIME

¯¯¯¯ Pin

Table 11

TIME

¯¯¯¯ Timing Values

Variable

Description

Min

Max

Units

TIME

¯¯¯¯ strobe pulse width

125

µs

Negation of Time strobe to start of time packet

100

ms

8.3

Settable I/O Modes

The LTP5900 offers a choice of two I/O modes. The functionality of the interface will be determined by the setting of

Mode pin B whose pinout is described in 5.0 Pinout.

Table 12

Mode Pin Settings

Pin

Mode 1

Mode 3

Mode pin B

Externally tied low

Externally tied high

All modes provide a means of transmitting and receiving serial data through the wireless network, as well as a command

interface that provides synchronized time stamping, local configuration, and diagnostics.

Mode 1 implements an 8-bit, no parity, 9600 bps baud three, four or five-signal serial interface with bidirectional packet-

level flow control operating at 9600 bps. In certain OEM designs, one or two of the serial handshake signals may be optional

for reduced pin count, as described in Table 13.

Mode 3 implements an 8-bit, no parity, 115.2 kbps baud five-signal serial interface with bidirectional packet-level flow

control and byte-level flow control in the mote-to-microprocessor direction only.

8.3.1

Mode 1: Three/Four/Five-signal Serial Interface (9600 bps)

The LTP5900 mode 1 provides a three, four, or five-signal serial interface that is optimized for low-powered embedded

applications (and in certain designs may provide a low pin count serial solution). The mode 1 serial interface is comprised of

the data pins (TX, RX) as well as handshake pins (MT_RTS

¯¯¯¯¯¯¯ , MT_CTS

¯¯¯¯¯¯¯ , SP_CTS

¯¯¯¯¯¯¯) used for bidirectional flow control. The

MT_RTS

¯¯¯¯¯¯¯ signal is ideal for designs where the microprocessor requires extra time to prepare to receive a packet (for example,

the OEM microprocessor sleeps periodically, but requires a wake-up signal prior to receiving a packet). Refer to Table 13 for

information on each handshake pin, including details on which pins are optional.