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LTP5900 Datasheet(PDF) 13 Page - Linear Technology |
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LTP5900 Datasheet(HTML) 13 Page - Linear Technology |
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13 / 21 page ![]() LTP5900 Mote Datasheet Dust Networks 13 SP_CTS ¯¯¯¯¯¯¯. MT_CTS ¯¯¯¯¯¯¯ Output MT_CTS ¯¯¯¯¯¯¯ provides packet-level flow control for packets transferred from the microprocessor to the mote that are destined for transfer over the network. Upon reset, following boot the mote will negate MT_CTS ¯¯¯¯¯¯¯ until the mote establishes a wireless network connection. During operation, the mote will negate MT_CTS ¯¯¯¯¯¯¯ if the mote does not have sufficient buffering to accept another packet. MT_CTS ¯¯¯¯¯¯¯ will also remain high if the mote is not part of the network. The microprocessor must check that the MT_CTS ¯¯¯¯¯¯¯ pin is low before initiating each serial packet for wireless transmission. Note that the mote may receive local serial packets at any time regardless of the MT_CTS ¯¯¯¯¯¯¯ state. For a list of local commands, see the SmartMesh IA-510 Mote Serial API Guide. TIME ¯¯¯¯ Input The TIME ¯¯¯¯ pin can be used for triggering a timestamp packet. Its usage is optional. 8.3.3 UART AC Timing Table 15 UART Timing Values Variable Description Min Max Units tRX_BAUD Deviation from baud rate -2 +2 % tRX_STOP Number of stop bits (9600 bps) 1 bit period tRX_STOP Number of stop bits (115.2 kbps) 1.5 bit period tTX_BAUD Deviation from baud rate -1 +1 % tTX_STOP Number of stop bits 1 bit period tSP_CTS to MT_RTS Assertion of SP_CTS ¯¯¯¯¯¯¯ to negation of MT_RTS ¯¯¯¯¯¯¯ 0 10 ms tMT_RTS to SP_CTS Assertion of MT_RTS ¯¯¯¯¯¯¯ to assertion of SP_CTS ¯¯¯¯¯¯¯ 500 ms tMT_RTS retry Time from a MT_RTS ¯¯¯¯¯¯¯ timeout to the retry. 500 ms tSP_CTS to TX Assertion of SP_CTS ¯¯¯¯¯¯¯ to start of byte 0 10 ms tTX to SP_CTS Start of byte to negation of SP_CTS ¯¯¯¯¯¯¯ 1 bit period tSP_CTS ack PW Negation pulse width of SP_CTS ¯¯¯¯¯¯¯ 500 ns tdiag_ack_timeout* The mote responds to all requests within this time. 125 ms tinterbyte_timeout Falling edge of TX to falling edge of SP_CTS ¯¯¯¯¯¯¯ (Mode 3 only) 7.1 ms tinterpacket_delay The sender of an HDLC packet must wait at least this amount of time before sending another packet 20 ms * For more information about supported requests and details on when tdiag_ack_timeout applies, refer to the SmartMesh IA-510 Mote Serial API Guide . |
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