LT6201 datasheet(12/20 Pages) LINER

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LTC2314-14

231414f

For more information www.linear.com/2314-14

applicaTions inForMaTion

The output swing on the SDO pin is controlled by the

OVDD pin voltage and supports a wide operating range

from 1.71V to 5.25V independent of the VDD pin voltage.

Power Considerations

The LTC2314-14 provides two sets of power supply pins:

the analog 5V power supply (VDD) and the digital input/

output interface power supply (OVDD). The flexible OVDD

supply allows the LTC2314-14 to communicate with any

digital logic operating between 1.8V and 5V, including

2.5V and 3.3V systems.

Entering Nap/Sleep Mode

Pulsing CS two times and holding SCK static places the

LTC2314-14 into nap mode. Pulsing CS four times and

holding SCK static places the LTC2314-14 into sleep mode.

In sleep mode, all bias circuitry is shut down, including the

internal bandgap and reference buffer, and only leakage

currents remain (0.8µA typical). Because the reference

buffer is externally bypassed with a large capacitor (2.2µF),

the LTC2314-14 requires a significant wait time (1.1ms) to

recharge this capacitance before an accurate conversion

can be made. In contrast, nap mode does not power down

the internal bandgap or reference buffer allowing for a fast

wake-upandaccurateconversionwithinoneconversionclock

cycle. Supply current during nap mode is nominally 1.8mA.

Figure 8: LTC2314-14 Entering/Exiting Nap Mode

Figure 9: LTC2314-14 Entering/Exiting Sleep Mode

SCK

SDO

HI-Z STATE

231414 F08

NAP MODE

HOLD STATIC HIGH or LOW

START tACQ

SCK

SDO

HI-Z STATE

231414 F09

NAP MODE

SLEEP MODE

HOLD STATIC HIGH or LOW

START tACQ

VREF RECOVERY

tWAIT

Exiting Nap/Sleep Mode

WakinguptheLTC2314-14fromeithernaporsleepmode,

as shown in Figures 8 and 9, requires SCK to be pulsed

one time. A conversion may be started immediately fol-

lowing nap mode as shown in Figure 8. A period of time

allowing the reference voltage to recover must follow

waking up from sleep mode as shown in Figure 9. The

wait period required before initiating a conversion for the

recommended value of CREF of 2.2µF is 1.1ms.

Power Supply Sequencing

The LTC2314-14 does not have any specific power sup-

ply sequencing requirements. Care should be taken to

observe the maximum voltage relationships described in

the Absolute Maximum Ratings section.

Single-Ended Analog Input Drive

The analog input of the LTC2314-14 is easy to drive. The

input draws only one small current spike while charging

the sample-and-hold capacitor at the end of conversion.

During the conversion, the analog input draws only a small

leakage current. If the source impedance of the driving

circuit is low, then the input of the LTC2314-14 can be

driven directly. As the source impedance increases, so

will the acquisition time. For minimum acquisition time

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