LT6201 datasheet(17/20 Pages) LINER

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LTC2314-14

231414f

For more information www.linear.com/2314-14

applicaTions inForMaTion

Figure 16. Top Silkscreen

Figure 17. Layer 1 Top Layer

Figure 18. Layer 2 GND Plane

analog signals or underneath the ADC. The following is an

exampleofarecommendedPCBlayout.Asinglesolidground

plane is used. Bypass capacitors to the supplies are placed

as close as possible to the supply pins. Low impedance

common returns for these bypass capacitors is essential to

the low noise operation of the ADC. The analog input traces

are screened by ground. For more details and information

refer to DC1563A, the evaluation kit for the LTC2314-14.

Bypassing Considerations

High quality tantalum and ceramic bypass capacitors

should be used at the VDD, OVDD and REF pins. For opti-

mum performance, a 2.2µF ceramic chip capacitor should

be used for the VDD and OVDD pins. The recommended

bypassing for the REF pin is also a low ESR, 2.2µF ceramic

capacitor. The traces connecting the pins and the bypass

capacitors must be kept as short as possible and should

be made as wide as possible avoiding the use of vias.

ThefollowingisanexampleofarecommendedPCBlayout.

All analog circuitry grounds should be terminated at the

LTC2314-14. The ground return from the LTC2314-14 to

the power supply should be low impedance for noise free

operation. Digital circuitry grounds must be connected to

the digital supply common.

In applications where the ADC data outputs and control

signals are connected to a continuously active micropro-

cessor bus, it is possible to get errors in the conversion

results. These errors are due to feed-through from the

microprocessor to the successive approximation com-

parator. The problem can be eliminated by forcing the

microprocessor into a “Wait” state during conversion

or by using tri-state buffers to isolate the ADC data bus.

LT6201 Datasheet(PDF) 17 Page - Linear Technology