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OR3LP26B Datasheet(PDF) 180 Page - Agere Systems

Part # OR3LP26B
Description  Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
PDF  184 Pages
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Manufacturer  AGERE [Agere Systems]
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OR3LP26B Datasheet(HTML) 180 Page - Agere Systems

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ORCA OR3LP26B FPSC
Data Sheet
Embedded Master/Target PCI Interface
March 2000
180
Lucent Technologies Inc.
Lucent Technologies Inc.
Package Parasitics
The electrical performance of an IC package, such as signal quality and noise sensitivity, is directly affected by the
package parasitics. Table 73 lists eight parasitics associated with the
ORCA packages. These parasitics represent
the contributions of all components of a package, which include the bond wires, all internal package routing, and
the external leads.
Four inductances in nH are listed: LSW and LSL, the self-inductance of the lead; and LMW and LML, the mutual
inductance to the nearest neighbor lead. These parameters are important in determining ground bounce noise and
inductive crosstalk noise. Three capacitances in pF are listed: CM, the mutual capacitance of the lead to the near-
est neighbor lead; and C1 and C2, the total capacitance of the lead to all other leads (all other leads are assumed to
be grounded). These parameters are important in determining capacitive crosstalk and the capacitive loading effect
of the lead. The lead resistance value, RW, is in m
Ω.
The parasitic values in Table 73 are for the circuit model of bond wire and package lead parasitics. If the mutual
capacitance value is not used in the designer’s model, then the value listed as mutual capacitance should be added
to each of the C1 and C2 capacitors.
Table 73. Package Parasitics
5-3862(F).a
Figure 66. Package Parasitics
Package Type
LSW
(nH)
LMW
(nH)
RW
(m
Ω)
C1
(pF)
C2
(pF)
CM
(pF)
LSL
(nH)
LML
(nH)
352-Pin PBGA
5
2
220
1.5
1.5
1.5
7—12
3—6
680-Pin EBGA
3.8
1.3
250
1.0
1.0
0.3
2.8—5.0
0.5—1.0
PAD N
BOARD PAD
CM
C1
LSW
RW
LSL
LMW
C2
C1
LML
C2
PAD N + 1
LSW
RW
LSL



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