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STM32F103RET6 Datasheet(PDF) 97 Page - STMicroelectronics |
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STM32F103RET6 Datasheet(HTML) 97 Page - STMicroelectronics |
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97 / 130 page ![]() STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics Doc ID 14611 Rev 8 97/130 Figure 51. SPI timing diagram - master mode(1) 1. Measurement points are done at CMOS levels: 0.3VDD and 0.7VDD. ai14136 CPHA= 0 MOSI OUTUT MISO INP UT CPHA= 0 MS BIN M SB OUT BI T6 IN LSB OUT LSB IN CPOL=0 CPOL=1 B I T1 OUT NSS input tc(SCK) tw(SCKH) tw(SCKL) tr(SCK) tf(SCK) th(MI) High CPHA=1 CPHA=1 CPOL=0 CPOL=1 tsu(MI) tv(MO) th(MO) |
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