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STM32F103RET6 Datasheet(PDF) 47 Page - STMicroelectronics |
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STM32F103RET6 Datasheet(HTML) 47 Page - STMicroelectronics |
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47 / 130 page ![]() STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics Doc ID 14611 Rev 8 47/130 Table 16. Maximum current consumption in Sleep mode, code running from Flash or RAM Symbol Parameter Conditions fHCLK Max(1) 1. Based on characterization, tested in production at VDD max, fHCLK max with peripherals enabled. Unit TA = 85 °C TA = 105 °C IDD Supply current in Sleep mode External clock(2), all peripherals enabled 2. External clock is 8 MHz and PLL is on when fHCLK > 8 MHz. 72 MHz 45 46 mA 48 MHz 31 32 36 MHz 24 25 24 MHz 17 17.5 16 MHz 12.5 13 8 MHz 8 8 External clock(2), all peripherals disabled 72 MHz 8.5 9 48 MHz 7 7.5 36 MHz 6 6.5 24 MHz 5 5.5 16 MHz 4.5 5 8 MHz 4 4 |
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